ADP3611JRMZ-REEL ON Semiconductor, ADP3611JRMZ-REEL Datasheet - Page 3

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ADP3611JRMZ-REEL

Manufacturer Part Number
ADP3611JRMZ-REEL
Description
IC MOSFET DRIVER DUAL 10-MSOP
Manufacturer
ON Semiconductor
Type
High Side/Low Sider
Datasheet

Specifications of ADP3611JRMZ-REEL

Configuration
High and Low Side, Synchronous
Input Type
PWM
Delay Time
30ns
Current - Peak
25A
Number Of Configurations
1
Number Of Outputs
2
Voltage - Supply
4.6 V ~ 5.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Product
MOSFET Gate Drivers
Propagation Delay Time
20 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.6 V
Supply Current
1 mA
Maximum Operating Temperature
+ 100 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 10 C
Number Of Drivers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADP3611JRMZ-REEL
Manufacturer:
ON Semiconductor
Quantity:
64
Part Number:
ADP3611JRMZ-REEL
Manufacturer:
ADI/亚德诺
Quantity:
20 000
NOTE:
1. For propagation delays, t
2. The turn−on of DRVL is initiated after IN goes low by either SW crossing a ~1 V threshold or by expiration of t
3. Guaranteed by characterization, not production tested.
Table 2. ELECTRICAL CHARACTERISTICS
LOGIC INPUTS (IN, SD, DRVLSD, CROWBAR)
HIGH−SIDE DRIVER
LOW−SIDE DRIVER
BOOTSTRAP RECTIFIER
SWITCH NODE RESISTOR
SUPPLY
SW Transition Timeout (Note 2)
Zero−crossing Threshold
Input Voltage High
Input Voltage Low
Input Current
CROWBAR Resistance
DRVLSD Propagation Delay Time
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay Times (Note 1)
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay Times
(Notes 1 and 2)
Output Resistance
Switch Node Resistor
Supply Voltage Range
Supply Current − Normal Mode
Supply Current
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
(Note 3)
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
Parameter
− Shutdown Mode
pdh
refers to the specified signal going high, and t
t
t
pdhDRVLSD
pdlDRVLSD
t
t
I
Symbol
t
I
pdhDRVH
t
pdhDRVL
pdlDRVH
SYS(NM)
pdlDRVL
R
SYS(SD)
t
t
t
t
t
rDRVH
fDRVH
rDRVL
fDRVL
SWTO
R
V
V
V
R
BOOT
V
I
IN
SW
ZC
CC
IH
IN
IL
(V
CC
= SD = 5 V, BST − SW = 5 V, T
http://onsemi.com
SW = 2 V
Inputs = 0 V or 5 V, IN, SD, DRVLSD
Resistance from CROWBAR to GND
C
C
C
C
C
C
C
C
C
EN = 0 V
I
I
V
V
CC
CC
CC
CC
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
+ I
+ I
Rising
Falling
BST
BST
= 3 nF, Figure 3
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
= 3 nF, Figure 4
3
, IN = 0 V or 5 V
, SD = 0 V
Conditions
pdl
refers to the signal going low with transitions measured at 50%.
A
= −10°C to 100°C, unless otherwise noted)
Min
150
2.0
4.6
−1
15
50
4
SWTO
4.35
Typ
250
270
210
1.9
1.0
1.7
0.8
1.8
0.5
20
20
15
30
20
20
15
15
15
10
30
3
.
Max
450
200
0.8
3.3
2.3
3.3
2.3
5.5
4.5
+1
35
25
60
40
30
25
40
30
18
1
Unit
mA
mV
kW
kW
mA
mA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
W
W
W
W
V
W
V
V

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