ISL83204AIBZT Intersil, ISL83204AIBZT Datasheet

ISL83204AIBZT

Manufacturer Part Number

ISL83204AIBZT

Description

IC FET DRVR 60V/2.5A HF 20-SOIC

Manufacturer

Intersil

Datasheet

1.ISL83204AIPZ.pdf (15 pages)

Specifications of ISL83204AIBZT

Configuration

H Bridge

Input Type

Differential

Delay Time

70ns

Current - Peak

2.6A

Number Of Configurations

Number Of Outputs

High Side Voltage - Max (bootstrap)

75V

Voltage - Supply

9.5 V ~ 15 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

20-SOIC (7.5mm Width)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Download datasheet (235Kb)

60V/2.5A Peak, High Frequency Full Bridge

FET Driver

The ISL83204A is a high frequency, medium voltage Full

Bridge N-Channel FET driver IC, available in 20 lead plastic

SOIC and DIP packages. The ISL83204A includes an input

comparator used to facilitate the “hysteresis” and PWM

modes of operation. Its HEN (high enable) lead can force

current to freewheel in the bottom two external power

MOSFETs, maintaining the upper power MOSFETs off.

Since it can switch at frequencies up to 1MHz, the

ISL83204A is well suited for driving Voice Coil Motors,

switching power amplifiers and power supplies.

ISL83204A can also drive medium voltage brush motors,

and two ISL83204As can be used to drive high performance

stepper motors, since the short minimum “on-time” can

provide fine micro-stepping capability.

Short propagation delays of approximately 55ns maximize

control loop crossover frequencies and dead-times which

can be adjusted to near zero to minimize distortion, resulting

in precise control of the driven load.

Ordering Information

*Add “-T” suffix for tape and reel.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100%

matte tin plate termination finish, which are RoHS compliant and

compatible with both SnPb and Pb-free soldering operations. Intersil

Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

ISL83204AIPZ

(Note)

ISL83204AIBZ*

(Note)

NUMBER

PART

ISL83204AIPZ -40 to +85 20 Ld PDIP

ISL83204AIBZ -40 to +85 20 Ld SOIC

MARKING

PART

RANGE

TEMP

(°C)

Data Sheet

(Pb-Free)

PACKAGE

E20.3

M20.3

DWG. #

PKG.

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Drives N-Channel FET Full Bridge Including High Side

• Bootstrap Supply Max Voltage to 75VDC

• Drives 1000pF Load at 1MHz in Free Air at +50°C with

• User-Programmable Dead Time

• Charge-Pump and Bootstrap Maintain Upper Bias

• DIS (Disable) Pin Pulls Gates Low

• Input Logic Thresholds Compatible with 5V to 15V Logic

• Very Low Power Consumption

• Undervoltage Protection

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Medium/Large Voice Coil Motors

• Full Bridge Power Supplies

• Switching Power Amplifiers

• Uninterruptible Power Supplies

• High Performance Motor Controls

• Noise Cancellation Systems

• Battery Powered Vehicles

Pinout

Chop Capability

Rise and Fall Times of Typically 10ns

Supplies

Levels

March 20, 2007

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

HDEL

LDEL

BHB

HEN

OUT

AHB

DIS

IN+

IN-

(20 LD PDIP, 20 LD SOIC)

ISL83204A

TOP VIEW

ISL83204A

BHO

BHS

BLO

BLS

ALS

ALO

AHS

AHO

FN6397.2

Related parts for ISL83204AIBZT

ISL83204AIBZT Summary of contents

Page 1

... LD PDIP SOIC) TOP VIEW 1 20 BHB BHO HEN 2 19 BHS DIS 3 18 BLO BLS OUT IN IN- ALS 7 14 HDEL ALO 8 13 LDEL 9 12 AHS AHB AHO Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved ...

Page 2

Application Block Diagram 12V HEN DIS ISL83204A IN+ IN- GND Functional Block Diagram UNDER- CHARGE VOLTAGE PUMP HEN DIS 3 5 OUT 6 IN HDEL 9 LDEL ...

Page 3

Typical Application (Hysteresis Mode Switching) 1 BHB 12V 2 HEN 3 DIS DIS OUT IN IN HDEL LDEL 9 AHB 10 GND 3 ISL83204A 20 BHO 19 BHS 18 BLO 17 BLS ...

Page 4

Absolute Maximum Ratings Supply Voltage, V and -0.3V to 16V DD CC Logic I/O Voltages . . . . ...

Page 5

Electrical Specifications +25°C, Unless Otherwise Specified (Continued) A PARAMETERS SYMBOL Voltage Gain AVOL OUT High Level Output V OH Voltage OUT Low Level Output V OL Voltage Low Level Output Current I OL High ...

Page 6

Switching Specifications 1000pF, and T L PARAMETERS Lower Turn-off Propagation Delay (IN+/IN- to ALO/BLO) Upper Turn-off Propagation Delay (IN+/IN- to AHO/BHO) Lower Turn-on Propagation Delay (IN+/IN- to ALO/BLO) Upper Turn-on Propagation Delay (IN+/IN- to ...

Page 7

Pin Descriptions PIN NUMBER SYMBOL 1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30μA out of this ...

Page 8

Timing Diagrams t HPHL U/V = DIS 0 1 HEN IN+ > IN- ALO AHO BLO BHO t LPHL t HEN-PHL U/V = DIS 0 HEN IN+ > IN- ALO AHO BLO BHO t DLPLH U/V or DIS HEN IN+ ...

Page 9

Typical Performance Curves SUPPLY VOLTAGE (V) DD FIGURE 4. QUIESCENT I SUPPLY CURRENT SUPPLY VOLTAGE 100k 200k 300k 400k 500k ...

Page 10

Typical Performance Curves -90 -100 -110 -120 -50 - JUNCTION TEMPERATURE (°C) FIGURE 10. DIS LOW LEVEL INPUT CURRENT I TEMPERATURE -40 - JUNCTION TEMPERATURE (°C) FIGURE 12. ...

Page 11

Typical Performance Curves 450 425 400 375 350 -50 - JUNCTION TEMPERATURE (°C) FIGURE 16. tT REFRESH PULSE WIDTH vs REF-PW TEMPERATURE -40 - JUNCTION TEMPERATURE (°C) FIGURE ...

Page 12

Typical Performance Curves 13.5 12.5 11.5 10.5 9.5 8.5 -40 - JUNCTION TEMPERATURE (°C) FIGURE 22. GATE DRIVE FALL TIME t 6.0 5.5 5.0 4.5 4.0 -40 - JUNCTION TEMPERATURE (°C) FIGURE 24. V ...

Page 13

Typical Performance Curves 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 ABH FIGURE 28. PEAK PULLUP CURRENT I VOLTAGE 1000 500 200 100 50 20 ...

Page 14

Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...

Page 15

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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