IR2114SSTRPBF International Rectifier, IR2114SSTRPBF Datasheet - Page 20

• Manufacturer Part Number: IR2114SSTRPBF
• Description: IC DVR HALF BRIDGE 600V 24-SSOP
• Manufacturer: International Rectifier

Specifications of IR2114SSTRPBF

• Configuration: Half Bridge
• Input Type: Non-Inverting
• Delay Time: 440ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 2
• High Side Voltage - Max (bootstrap): 600V
• Voltage - Supply: 11.5 V ~ 20 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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3.1 Distance from High to Low Voltage
The IR2x14x pinout maximizes the distance between
floating (from DC- to DC+) and low voltage pins. It’s
strongly recommended to place components tied to
floating voltage on the high voltage side of device (V
V
opposite side.
3.2 Ground Plane
To minimize noise coupling, the ground plane must not
be placed under or near the high voltage floating side.
3.3 Gate Drive Loops
Current loops behave like antennas and are able to
receive and transmit EM noise. In order to reduce the
EM coupling and improve the power switch turn on/off
performances, gate drive loops must be reduced as
much as possible. Figure 23 shows the high and low
side gate loops.
Moreover, current can be injected inside the gate drive
loop
capacitance. The parasitic auto-inductance of the gate
loop contributes to developing a voltage across the
gate-emitter, increasing the possibility of self turn-on.
For this reason, it is strongly recommended to place the
three gate resistances close together and to minimize
the loop area (see Fig. 23).
3.4 Supply Capacitors
The IR2x14x output stages are able to quickly turn on
an IGBT, with up to 2 A of output current. The supply
capacitors must be placed as close as possible to the
device pins (V
and V
parasitic inductance/resistance.
VB/ VCC
VS/COM
S
SSDH/L
H/LOP
H/LON
side) while the other components are placed on the
S
via
for the floating supply) in order to minimize
the
CC
3 PCB Layout Tips
Figure 23: gate drive loop
resistance
gate
and V
IGBT
SS
Gate Drive
for the ground tied supply, V
Loop
collector-to-gate
V
GE
I
GC
C
GC
parasitic
B
B
,
20
3.5 Routing and Placement Example
Figure 24 shows one of the possible layout solutions
using a 3 layer PCB. This example takes into account
all the previous considerations. Placement and routing
for supply capacitors and gate resistances in the high
and low voltage side minimize the supply path loop and
the gate drive loop. The bootstrap diode is placed under
the device to have the cathode as close as possible to
the bootstrap capacitor and the anode far from high
voltage and close to V
Information below refers to Fig. 24:
Bootstrap section: R1, C1, D1
High side gate: R2, R3, R4
High side Desat: D2
Low side supply: C2
Low side gate: R5, R6, R7
Low side Desat: D3
V
V
V
V
GH
GL
EH
EL
Figure 24: layout example
V
CC
R2
R3
R4
R5
R6
R7
IR2114/IR2214SSPbF
c) Ground Plane
R1
b) Bottom Layer
CC
a)
.
C2
IR2214
Top Layer
C1
© 2009 International Rectifier
D2
D3
DC+
Phase