MAX7302ATE+ Maxim Integrated Products, MAX7302ATE+ Datasheet
MAX7302ATE+
Specifications of MAX7302ATE+
Related parts for MAX7302ATE+
MAX7302ATE+ Summary of contents
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... Optional Input Debouncing ♦ I/O Ports Configurable as Logic Gates (CLA) ♦ External RST Input ♦ Oscillator Input and Output Enable Cascading Multiple Devices ♦ Low 0.75µA (typ) Standby Current PART MAX7302AEE+ MAX7302ATE+ +Denotes lead-free package. *EP = Exposed paddle. Applications μC SDA SCL RST ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) V ..........................................................................-0. SCL, SDA, AD0, RST, P1..................................-0. P2–P9 ............................................................-0. P1–P9 ...
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Level-Translating GPIO and LED Driver with CLA PORT, INTERRUPT (INT), AND RESET (RST) TIMING CHARACTERISTICS (V = 1.62V to 3.6V MAX DD MIN (Figures 10, 15, 16 and 17) PARAMETER Oscillator Frequency Port Output ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA (V = 3.3V 3.3V and T = +25°C, unless otherwise noted STANDBY CURRENT vs. TEMPERATURE 2.0 INTERFACE IDLE 1.8 INTERNAL OSCILLATOR DISABLED 1.6 ...
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Level-Translating GPIO and LED Driver with CLA (V = 3.3V 3.3V and T = +25°C, unless otherwise noted STAGGERED PWM OUTPUTS MAX7302 toc09 PORT2 5V/div PORT3 5V/div PORT4 5V/div PORT5 5V/div 400μs/div _______________________________________________________________________________________ 2 SMBus/I ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA PIN NAME QSOP TQFN AD0 RST P1/INT 5 3 P2/OSCIN 6 4 P3/OSCOUT ...
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Level-Translating GPIO and LED Driver with CLA MAX7302 AD0 SCL SDA RST REGISTER Detailed Description The MAX7302 9-port, general-purpose port expander operates from a 1.62V to 3.6V power supply. Port P1 can be configured as an input and an open-drain ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Table 1. Register Address Map REGISTER Port P1 or INT Output Port P2 or OSCIN Input Port P3 or OSCOUT Output Port P4 Port P5 Port P6 Port ...
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Level-Translating GPIO and LED Driver with CLA Table 3. Configuration Register (0x26) REGISTER BIT DESCRIPTION Interrupt status flag D7 (read only) Transition flag D6 (read only) D5 Reserved Blink prescalor bits D4, D3, D2 RST timer D1 RST POR D0 ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA The MAX7302 is set to one of four I using the address input AD0 (see Table 5) and is 2 accessed over SMBus serial ...
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Level-Translating GPIO and LED Driver with CLA PORT_ [2] (DEBOUNCE) PORT_ [0] 0 (PORTIN) 1 TRANSITION DETECTION INT Figure 1. Input Port Structure Table 7. Port I/O Registers (I/O Port Set as an Output, Registers 0x01 to 0x09) REGISTER BIT ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA 3-BIT PRESCALER CLOCK CONFIG26 [4:2] Figure 2. Output Port Structure SELECT INPUT OUTPUT P1 Figure 3. Port I/O Structure Ports P2–P9 are overvoltage protected to ...
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Level-Translating GPIO and LED Driver with CLA Table 8. Port Lock Registers ADDRESS CODE D7 D6 Port Port 0x72 P5 P4 0x73 — — When debouncing is enabled for a port input, transition detection applies to the stored debounced input ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Port P1 can be configured as a latching interrupt out- put, INT, that flags any transients on any combination of selected ports configured as inputs. Configurable logic gate ...
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Level-Translating GPIO and LED Driver with CLA 0 TO 1MHz EXTERNAL P2/OSCIN OSCILLATOR 0 TO 1MHz EXTERNAL P2/OSCIN OSCILLATOR Figure 5. Synchronizing Multiple MAX7302s (External Clock) Table 9. PWM Settings on Output Port PWM SETTINGS Port static ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA PORT REGISTER VALUE 0b0X000000 OUTPUT STATIC LOW (STATIC LOGIC-LOW OUTPUT OR LED DRIVE ON) 0b0X000001 OUTPUT LOW 1/32 DUTY PWM 0b0X000010 OUTPUT LOW 2/32 DUTY PWM 0b0X000011 OUTPUT ...
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Level-Translating GPIO and LED Driver with CLA Table 10. Blink and PWM Frequencies BLINK OR PWM SETTING 0.125H z) Blink period is 4s (0.25Hz) Blink period is 2s (0.5Hz) ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Table 12. CLA0 (P2–P5) Configuration Register Setting (0x28) (continued) FUNCTION 2 input AND/OR P2 and P3 noninverted 2 input AND/OR P2 and P3 inverted 2 input AND/OR P2 ...
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Level-Translating GPIO and LED Driver with CLA Table 14. CLA1 (P6–P9) Configuration Register Setting (0x29) (continued) FUNCTION 2 input AND/OR P6 and P8 noninverted 2 input AND/OR P6 and P8 inverted 2 input AND/OR P6 inverted and P8 2 input ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Table 18. Port I/O Registers (I/O Port 5 and 9 Configured as CLA Outputs, Registers 0x05 and 0x09) REGISTER BIT DESCRIPTION D7 Don’t care Port supply D6 reference ...
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Level-Translating GPIO and LED Driver with CLA ENABLE P2 DEBOUNCE PIN P2 INVERT P2 DEBOUNCE PIN P3 INVERT P3 ENABLE P3 ENABLE P4 DEBOUNCE PIN P4 INVERT P4 INVERT P5 P5 OUTPUT REGISTER PIN CLA/GPIO ENABLE EXOR23 ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Serial Interface Serial Addressing The MAX7302 operates as a slave that sends and 2 receives data through an I C-compatible, 2-wire inter- face. The interface uses a serial-data ...
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Level-Translating GPIO and LED Driver with CLA The acknowledge bit is a clocked 9th bit that the recipi- ent uses to handshake receipt of each byte of data (see Figure 13). Thus, each effectively transferred byte requires 9 bits. The ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA WRITE TO OUTPUT PORTS REGISTERS (P4) SCL SLAVE ADDRESS SDA START CONDITION P9 ...
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Level-Translating GPIO and LED Driver with CLA Applications Information Serial interfaces SDA, SCL, and AD0 remain high impedance with asserted on them when the MAX7302 is powered down (V = 0V) independent of DD the voltages on ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA TOP VIEW + ADO 2 RST 3 MAX7302 P1/INT 4 P2/OSCIN 5 P3/OSCOUT QSOP Chip Information PROCESS: BiCMOS 26 ______________________________________________________________________________________ ...
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Level-Translating GPIO and LED Driver with CLA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ 2 SMBus/I C Interfaced 9-Port, Package Information 27 ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) E MARKING E/2 AAAA D/2 ...
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Level-Translating GPIO and LED Driver with CLA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) PKG 8L 3x3 12L 3x3 REF. MIN. NOM. MAX. MIN. ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products ...