MAX16833AUE/V+T Maxim Integrated Products, MAX16833AUE/V+T Datasheet - Page 13

• Manufacturer Part Number: MAX16833AUE/V+T
• Description: IC HB LED DVR CURR SENSE 16TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX16833AUE/V+T

• Topology: Flyback, Low Side, PWM, SEPIC, Step-Down (Buck), Step-Up (Boost)
• Number Of Outputs: 1
• Internal Driver: No
• Type - Primary: Automotive, General Purpose
• Type - Secondary: High Brightness LED (HBLED)
• Frequency: 100kHz ~ 1MHz
• Voltage - Supply: 5 V ~ 65 V
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP (0.173", 4.40mm Width) Exposed pad
• Operating Temperature: -40°C ~ 125°C
• Current - Output / Channel: 3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -
• Lead Free Status / Rohs Status: Details

Figure 1. SYNC Circuit
Figure 1 shows the frequency-synchronization circuit
suitable for applications where a 5V amplitude pulse with
20% to 80% duty cycle is available as the synchronization
source. This circuit can be used for SYNC frequencies
in the 100kHz to 1MHz range. C1 and R2 act as a dif-
ferentiator that reduces the input pulse width to suit the
ICs’ RT/SYNC input. D2 bypasses the negative current
through C1 at the falling edge of the SYNC source to limit
the minimum voltage at the RT/SYNC pin. The differentia-
tor output is AC-coupled to the RT/SYNC pin through C2.
The output impedance of the SYNC source should be
low enough to drive the current through R2 on the rising
edge. The rise/fall times of the SYNC source should be
less than 50ns to avoid excessive voltage drop across C1
during the rise time. The amplitude of the SYNC source
can be between 4V and 5V. If the SYNC source amplitude
is 5V and the rise time is less than 20ns, then the maxi-
mum peak voltage at RT/SYNC pin can get close to 6V.
Under such conditions, it is desirable to use a resistor in
series with C1 to reduce the maximum voltage at the RT/
SYNC pin. For proper synchronization, the peak SYNC
pulse voltage at RT/SYNC pin should exceed 3.8V.
The MAX16833/MAX16833C feature a low-frequency
ramp output. Connect a capacitor from LFRAMP to
ground to program the ramp frequency. Connect to
SGND if not used. A resistor can be connected between
LFRAMP and RT/SYNC to dither the PWM switching
frequency to achieve spread spectrum. A lower value
resistor provides a larger amount of frequency dithering.
The LFRAMP voltage is a triangular waveform between
1V (typ) and 2V (typ). The ramp frequency is given by:
SYNC
(LFRAMP/MAX16833/ MAX16833C)
f
680pF
LFRAMP
C1
______________________________________________________________________________________
22I
R2
(Hz)
GND
=
Integrated High-Side Current Sense
C
Frequency Dithering
D2
SD103AWS
LFRAMP
1000pF
50 A
C2
High-Voltage HB LED Drivers with
F
GND
(F)
R
24.9I
RT
RT PIN
The MAX16833B/MAX16833D have a 2% accurate 1.64V
reference voltage on the REF output. Connect a 1FF
ceramic capacitor from REF to SGND to provide a stable
reference voltage. This reference can supply up to 80µA.
This output can drive a resistive divider to the ICTRL
input for analog dimming. The resistance from REF to
ground should be greater than 20.5kI.
CS is part of the current-mode control loop. The switch-
ing control uses the voltage on CS, set by R
Typical Operating Circuits) and R
Operating Circuits), to terminate the on pulse width of the
switching cycle, thus achieving peak current-mode con-
trol. Internal leading-edge blanking of 50ns is provided
to prevent premature turn-off of the switching MOSFET
in each switching cycle. Resistor R
between the source of the n-channel switching MOSFET
and PGND.
During switching, a current ramp with a slope of 50FA
x f
along with resistor R
compensation.
OVP sets the overvoltage-threshold limit across the
LEDs. Use a resistive divider between ISENSE+ to OVP
and SGND to set the overvoltage-threshold limit. An
internal overvoltage-protection comparator senses the
differential voltage across OVP and SGND. If the dif-
ferential voltage is greater than 1.23V, NDRV goes low,
DIMOUT goes high, and FLT asserts. When the differen-
tial voltage drops by 70mV, NDRV is enabled, DIMOUT
goes low, and FLT deasserts.
The ICs feature an active-low, open-drain fault indicator
(FLT). FLT goes low when one of the following conditions
occur:
U Overvoltage across the LED string
U Short-circuit condition across the LED string
U Overtemperature condition
FLT goes high when the fault condition ends.
SW
is sourced from the CS input. This current ramp,
Overvoltage-Protection Input (OVP)
(REF/MAX16833B/MAX16833D)
SLOPE
Voltage-Reference Output
Current-Sense Input (CS)
, programs the amount of slope
Fault Indicator (FLT)
Switching MOSFET
SLOPE
CS
(R1 in the Typical
is connected
CS
(R4 in the
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