LDS8161-002-T2 IXYS, LDS8161-002-T2 Datasheet
LDS8161-002-T2
Specifications of LDS8161-002-T2
Related parts for LDS8161-002-T2
LDS8161-002-T2 Summary of contents
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... Keypad and Display Backlight Cellular Phone PDAs and Smartphones DESCRIPTION The LDS8161 is a 6-channel and the LDS8141 channel linear LED driver for WLED applications. It includes ultra low dropout LDO current regulators at a maximum 31.875 mA per channel in a common cathode high side driver topology ...
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... LDS8161/41 TYPICAL APPLICATION CIRCUITS ABSOLUTE MAXIMUM RATINGS Parameter V , LEDx IN EN, SDAT, SCLK, SADD voltage Storage Temperature Range Junction Temperature Range Soldering Temperature HBM ESD Protection Level MM © 2009 IXYS Corp. Characteristics subject to change without notice Rating Unit 0. -65 to +160 °C -40 to +125 ° ...
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... LDS8161/41 RECOMMENDED OPERATING CONDITIONS Parameter per LED pin LED Total Output Current I LOAD Junction Temperature Range Typical application circuit with external components is shown on page 1. ELECTRICAL OPERATING CHARACTERISTICS (Over recommended operating conditions unless specified otherwise) V Name LEDx Channel Current DAC Range # of LEDx Current steps (linear steps) ...
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... LDS8161/ CHARACTERISTICS Over recommended operating conditions unless otherwise specified for 2.7 VIN 5.5V, over full ambient temperature range -40 to +85ºC. Symbol Parameter f SCL Clock Frequency SCL t Hold Time (repeated) START condition HD:STA t LOW period of the SCL clock LOW t HIGH period of the SCL clock ...
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... LDS8161/41 Option 2: Combined (extended) protocol: S Slave Address Start Condition Sr Start Repeat Condition R, W: Read bit (1), Write bit (0) A: Acknowledge (SDAT high) A*: Not Acknowledge (SDAT low) P: Stop Condition Slave Address: Device address 7 bits (MSB first). Register Address: Device register address 8 bits Data: Data to read or write 8 bits ...
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... LDS8161/41 LDS8161 / 41 REGISTERS DEFINITION AND PROGRAMMING Note: Unlisted register addresses are for factory use only; For proper operation write only to registers defined. ADDRESS DESCRIPTION 00h Bank A Current setting 01h Bank B Current setting Bank C Current setting 02h (8161 only; Not for 8141) ...
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... LDS8161/41 A0h Silicon diode dV /dT [7:0] F A2h LED dV /dT [7:0] F Silicon diode η [7:0] C0h Silicon diode R offset s D4h [7:0] D6h LED Rs offset [7:0] Table 1 Register Address Bit 7 Bit 6 Bit 5 LED 03h OT N/A Enable C2 (8161) Flag (8141) Same N/A N/A Table 2 ...
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... LDS8161/41 Table 3 Register Address Bit 7 Factory Set 1* 1Eh Factory trimmed; User should write 0 Note: *) Value by default Table 4 Register Address Bit 7 Bit 6 Software Standby reset = 1 mode = 1 1Fh Normal operation = 0* Note: *) Value by default **) Trim code defined by customer Bit — Software reset: resets device, all registers reset/cleared. ...
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... PWM code per each temperature point) Data bits Register 7 – 4 ΔPWM code for Address temperature, 56h 30 57h 40 58h 50 59h 60 Table 9: Valid ΔPWM Codes vs. Number of Adjustment Steps for LDS8161/ 41 De-rating Number of Binary Number of steps Code steps Not Used 1000 -7 1001 -6 1010 -5 1011 ...
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... LDS8161/41 PIN DESCRIPTION Function Serial clock input Serial data input/output Serial interface Address Programming Ground Reference Device enable (active high) LEDC2 anode terminal -8161 (NC for 8141) LEDC1 anode terminal -8161 (NC for 8141) LEDB2 anode terminal LEDB1 anode terminal LEDA2 anode terminal LEDA1 anode terminal Power Source Input ...
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... Gnd Vin to 1.8V LDO for digital core GND Figure 2: LDS8161/41 Functional Block Diagram BASIC OPERATION The LDS8161 / 41 may operate in following modes: a) Normal Operation Mode b) Normal Standby Mode c) Programming Modes d) Shutdown Mode NORMAL OPERATION MODE At power-up, V should be in the range from 2 ...
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... PWM dimming control is enabled Logarithmic Mode with reset duty cycle = 0 LED-Sense temperature disabled with the LUT in Logarithmic Mode for a Nichia NSSW020BT WLED; Table 10: Recommended Register Load Sequence for LDS8161/41 (Using the Factory Default De-Rating LUT) Reg Load Reg Sequence # (hex) 1 1Eh ...
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... Code for LED current is determined hex format, i. current code = 20/0.125 = 160 (dec) = A0h. The maximum current setting is 31.875 mA. Since the LDS8161/ low drop-out LDO based linear LED driver, when using maximum current levels, users should select LEDs with V maximize operation with Li-ion batteries. ...
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... DEFINITION AND PROGRAMMING section for read and write operations into the registers. Read and write instructions are initiated by the master controller/CPU and acknowledged by the slave LED driver. The LDS8161/41 allows user to choose between two addresses by connecting SADD pin (#3) either to ground pin (see Table ). ...
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... Diagnostics Register 1Dh, Bits from bit 5 to bit 0 represent LEDC2 - LEDA1 respectively with bit = 1 indicates fault condition at this particular LED pin. An open LED pin fault causes no harm in the LDS8161/41 or the LED as the high side driver has no current path from V or GND. Therefore, the fault IN detection status indicates only in the 1Dh diagnostic register, and no further action is required ...
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... For this mode, the EN pin should be logic HIGH with signal level from 1 voltage. SHUTDOWN MODE To set LDS8161/41 into the shutdown mode, the EN pin should be logic low more than 10 ms. The LDS8161/41 shutdown current is less than 1 µA. © 2009 IXYS Corp. ...
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... LDS8161/41 PACKAGE DRAWING AND DIMENSIONS 16-PIN TQFN (HV3), 3mm x 3mm, 0.5mm PITCH SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A2 0.178 0.203 b 0.20 0.25 D 2.95 3.00 D1 1.65 1.70 E 2.95 3.00 E1 1.65 1.70 e 0.50 typ L 0.325 0.375 m 0.150 typ n 0.225 typ Note: 1. All dimensions are in millimeters 2. Complies with JEDEC Standard MO-220 © ...
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... All packages are RoHS-compliant (Lead-free, Halogen-free). 2) The standard lead finish is Matte-Tin. 3) The device used in the above example is a LDS8161A 002–T2 (3x3 TQFN, Tape & Reel). 4) For additional package and temperature options, please contact your nearest IXYS Corp. Sales office. © 2009 IXYS Corp. ...
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... LDS8161/41 Appendix 1 Table 5 Dynamic Mode Dimming in Logarithmic Mode vs. register 05h data 0 00 100 1 01 -72.3 99. -66.3 99. -62.8 99. -60.3 99. -58.3 99. -56.7 99. -55.4 99. -54.3 99. -53.2 99. -52.3 99. -51.5 99. -50.7 99. -50 99. -49.4 99. -48.8 99. -48.2 99. -47.7 99. -47.2 99. -46.7 99. -46.3 99. -45.9 99. -45.5 99. -45.1 99. -44.7 99. -44.4 99. -44 99.37 ...
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... LDS8161/41 Table 10 Dynamic Mode Dimming in Logarithmic Mode vs. register 05h data 96 60 -28.1 96.02 128 97 61 -27.9 95.92 129 98 62 -27.7 95.83 130 99 63 -27.5 95.73 131 100 64 -27.3 95.63 132 101 65 -27.1 95.53 133 102 66 -26.9 95.43 134 103 67 -26.7 95.34 ...
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... LDS8161/41 Table 10 Dynamic Mode Dimming in Logarithmic Mode vs. register 05h data 192 C0 -11.6 73.46 224 193 C1 -11.3 72.68 225 194 C2 -11.1 71.90 226 195 C3 -10.9 71.12 227 196 C4 -10.6 70.34 228 197 C5 -10.4 69.56 229 198 C6 -10.2 68.77 230 199 C7 -10 67.99 ...
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... LDS8161/41 Warranty and Use IXYS CORP. MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES ...