ISL97635AIRZ-TK Intersil, ISL97635AIRZ-TK Datasheet - Page 18

IC LED DRVR WHT/RGB BCKLGT 24QFN

ISL97635AIRZ-TK

Manufacturer Part Number
ISL97635AIRZ-TK
Description
IC LED DRVR WHT/RGB BCKLGT 24QFN
Manufacturer
Intersil
Type
Backlight, White LED, RGBr
Datasheet

Specifications of ISL97635AIRZ-TK

Topology
PWM, Step-Up (Boost)
Number Of Outputs
6
Internal Driver
Yes
Type - Primary
Automotive, Backlight
Type - Secondary
RGB, White LED
Frequency
600kHz, 1.2MHz
Voltage - Supply
6 V ~ 24 V
Voltage - Output
34.5V
Mounting Type
Surface Mount
Package / Case
24-VQFN
Operating Temperature
-40°C ~ 85°C
Current - Output / Channel
35mA
Internal Switch(s)
Yes
Efficiency
91%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISL97635AIRZ-TK

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL97635AIRZ-TK
Manufacturer:
INTERSIL
Quantity:
1 240
Write Byte
The Write Byte protocol is only three bytes long. The first byte
starts with the slave address followed by the “command code,”
which translates to the “register index” being written. The third
byte contains the data byte that must be written into the register
selected by the “command code”. A shaded label is used on
cycles during which the slaved backlight controller “owns” or
“drives” the Data line. All other cycles are driven by the “host
master.”
Read Byte
As shown in the Figure 21, the 4 byte long Read Byte protocol
starts out with the slave address followed by the “command
code” which translates to the “register index.” Then the bus
direction turns around with the re-broadcast of the slave
address with bit 0 indicating a read (“R”) cycle. The fourth byte
contains the data being returned by the backlight controller.
That byte value in the data byte reflects the value of the register
being queried at the “command code” index. Note the bus
directions, which are highlighted by the shaded label that is
used on cycles during which the slaved backlight controller
“owns” or “drives” the Data line. All other cycles are driven by
the “host master.”
Slave Device Address
The slave address contains in 7 MSB plus one LSB as R/W bit
but these 8 bits are usually called slave address byte. As
shown in Figure 22, the high nibble of the slave address byte is
0x5 or 0101b to denote the “backlight controller class.” Bit 3 in
the lower nibble of the slave address byte is 1. Bit 0 is always
the R/W bit, as specified by the SMBus protocol. Note: In this
document, the device address will always be expressed as a
full 8-bit address instead of the shorter 7-bit address typically
ADDRESS
0x00
0x01
0x02
0x03
0x07
0x08
0x09
PWM
Brightness
Control Register
Device Control
Register
Fault/Status
Register
Identification
Register
DC Brightness
Control Register
Configuration
Register
Output Channel
Register
REGISTER
Reserved
Reserved
LED
PANEL
BRTDC7
Reserved
Reserved
BIT 7
BRT7
18
Reserved
Reserved
MFG3
BRTDC6
Reserved
Reserved
BIT 6
BRT6
Reserved
2_CH_SD 1_CH_SD
MFG2
BRTDC5
Reserved
CH5
BIT 5
BRT5
TABLE 2A. REGISTER LISTING
Reserved
MFG1
BRTDC4
Reserved
CH4
BIT 4
BRT4
ISL97635A
BRTDC3
CH3
Reserved
BL_STAT
MFG0
Reserved
BIT 3
BRT3
used in other backlight controller specifications to avoid
confusion. Therefore, if the device is in the write mode where bit
0 is 0, the slave address byte is 0x58 or 01011000b. If the
device is in the read mode where bit 0 is 1, the slave address
byte is 0x59 or 01011001b.
The backlight controller may sense the state of the pins at POR
or during normal operation—the pins will not change state while
the device is in operation.
SMBus Register Definitions
The backlight controller registers are Byte wide and
accessible via the SMBus Read/Write Byte protocols. Their
bit assignments are provided in the following sections with
reserved bits containing a default value of “0”.
PWM_MD
OV_CURR THRM_SHDN
REV2
BRTDC2
FSW
CH2
BRT2
BIT 2
FIGURE 22. SLAVE ADDRESS BYTE DEFINITION
MSB
0
IDENTIFIER
PWM_SEL
REV1
BRTDC1
VSC1
CH1
DEVICE
1
BRT1
BIT 1
0
BL_CTL
FAULT
REV0
BRTDC0
VSC0
CH0
BIT 0
BRT0
1
ADDRESS
1
DEVICE
DEFAULT
VALUE
0xC8
0xXF
0xFF
0x00
0xFF
0xFF
0x00
0
0
December 22, 2008
Read and Write
Read and Write
Read and Write
Read and Write
Read and Write
PROTOCOL
LSB
Read Only
Read Only
R/W
SMBUS
FN6564.2

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