ISL6140IBZ Intersil, ISL6140IBZ Datasheet - Page 11

• Manufacturer Part Number: ISL6140IBZ
• Description: IC CONTROLLER HOT PLUG 8-SOIC
• Manufacturer: Intersil
• Type: Hot-Swap Controllerr

Specifications of ISL6140IBZ

• Applications: General Purpose, VoIP
• Internal Switch(s): No
• Voltage - Supply: 36 V ~ 72 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ISL6150 (H version; Figure 9): Under normal
conditions (DRAIN < VPG), the Q
shorting the bottom of the internal resistor to V
turning Q
module is high enough, the voltage drop across the
6.2kΩ resistor will look like a logic high (relative to
DRAIN). Note that the module is only referenced to
DRAIN, not V
is on, and the DRAIN and V
voltage).
When the DRAIN voltage is high compared to VPG, Q
DMOS turns off, and the resistor and Q
PWRGD pin to one diode drop (~0.7V) above the
DRAIN pin. This should be able to pull low against the
module pull-up current, and disable the module.
Applications: GATE Pin
To help protect the external FET, the output of the
GATE pin is internally clamped; up to an 80V supply, it
will not be any higher than 15V (nominal 14V). From
about 18V down to 10V, the GATE voltage will be
around 4V below the supply voltage; at 10V supply, the
minimum GATE voltage is 5.4V (worst case is at
-40°C).
Applications: Optional
Components
In addition to the typical application, and the variations
already mentioned, there are a few other possible
components that might be used in specific cases. See
Figure 29 for some possibilities.
If the input power supply exceeds the 100V absolute
maximum rating, even for a short transient, that could
cause permanent damage to the IC, as well as other
components on the board. If this cannot be
guaranteed, a voltage suppressor (such as the
SMAT70A, D
V
If transients on the input power supply occur when the
supply is near either the OV or UV trip points, the GATE
could turn on or off momentarily. One possible solution
is to add a filter cap C
isolation resistor R
the filtering, but be aware of the voltage drop across it.
For example, a 1kΩ resistor, with 1mA of I
DD
(1.7V)
(SECTION OF) ISL6150
(H VERSION)
VPG
+
-
to V
FIGURE 9. ACTIVE HIGH ENABLE MODULE
EE
2
+
-
off. If the pull-up current from the external
on the board, it will clamp the voltage.
1
EE
VDD
) is recommended. When placed from
(but under normal conditions, the FET
10
Q
6.2k
RPG
3
V
. A large value of R
EE
4
to the V
Q2
11
EE
PWRGD
are almost the same
DRAIN
DD
3
C
DMOS will be on,
L
pin, through
+
2
10
clamp the
V
ON/OFF
ACTIVE HIGH
V
IN
MODULE
DD
ENABLE
IN
is better for
+
-
V
ISL6140, ISL6150
V
would
OUT
OUT
EE
, and
+
-
3
have 1V across it and dissipate 1mW. Since the UV and
OV comparators are referenced with respect to the V
supply, they should not be affected. But the GATE
clamp voltage could be offset by the voltage across the
extra resistor.
If there are negative transients on the DRAIN pin,
blocking diodes may help limit the amount of current
injected into the IC substrate. General purpose diodes
(such as 1N4148) may be used. Note that the ISL6140
(L version) requires one diode, while the ISL6150
(H version) requires two diodes. One consequence of
the added diodes it that the V
each diode drop.
The switch SW1 is shown as a simple pushbutton. It
can be replaced by an active switch, such as an NPN or
NFET; the principle is the same; pull the UV node below
its trip point, and then release it (toggle low). To
connect an NFET, for example, the drain goes to UV;
the source to V
high (relative to V
pulled low. Just make sure the NFET resistance is low
compared to the resistor divider, so that it has no
problem pulling down against it.
R
component acting as a pull-up device. The value of R8
is determined by how much current you want when
pulled low (also affected by the V
want to pull it low enough for a good logic low level. An
LED can also be placed in series with R
that case, the criteria is the LED brightness versus
current.
R
as described in the OV and UV section.
Applications: “Brick”
Regulators
One of the typical loads used are DC/DC regulators,
some commonly known as “brick” regulators, (partly
due to their shape, and because it can be considered a
“building block” of a system). For a given input voltage
range, there are usually whole families of different
output voltages and current ranges. There are also
various standardized sizes and pinouts, starting with
the original “full” brick, and since getting smaller
(half-bricks and quarter-bricks are now common).
Other common features may include: all components
(except some filter capacitors) are self-contained in a
molded plastic package; external pins for connections;
and often an ENABLE input pin to turn it on or off. A hot
plug IC, such as the ISL6140, is often used to gate
power to a brick, as well as turn it on.
Many bricks have both logic polarities available (Enable
Hi or Lo input); select the ISL6140 (L version) and
ISL6150 (H version) to match. There is little difference
between them, although the L version output is usually
simpler to interface.
8
7
and C
is a pull-up resistor for PWRGD, if there is no other
3
are used to delay the overcurrent shutdown,
EE
, and the gate is the input; if it goes
EE
), it turns the NFET on, and UV is
PG
voltage is offset by
DD
voltage); and you
8
, if desired. In
FN9039.4
EE