LT4250LIS8 Linear Technology, LT4250LIS8 Datasheet - Page 8

• Manufacturer Part Number: LT4250LIS8
• Description: IC CONTRLR HOTSWAP NEG 48V 8SOIC
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LT4250LIS8

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: -20 V ~ -80 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIONS INFORMATION
LT4250L/LT4250H
Hot Circuit Insertion
When circuit boards are inserted into a live –48V back-
plane, the bypass capacitors at the input of the board’s
power module or switching power supply can draw huge
transient currents as they charge up. The transient currents
can cause permanent damage to the board’s components
and cause glitches on the system power supply.
The LT4250 is designed to turn on a board’s supply volt-
age in a controlled manner, allowing the board to be safely
inserted or removed from a live backplane. The chip also
provides undervoltage, overvoltage and overcurrent pro-
tection while keeping the power module off until its input
voltage is stable and within tolerance.
Power Supply Ramping
The input to the power module on a board is controlled by
placing an external N-channel pass transistor (Q1) in the
power path (Figure 6a). R1 provides current fault detection
and R2 prevents high frequency oscillations. Resistors R4,
R5 and R6 provide undervoltage and over-voltage sensing.
By ramping the gate of Q1 up at a slow rate, the inrush
current charging load capacitors C3 and C4 can be limited
to a safe value when the board makes connection.
Resistor R3 and capacitor C2 act as a feedback network
to accurately control the inrush current. The C2 capacitor
can be calculated with the following equation:
–48V RTN
8
UV = 38.5V
OV = 71V
* DIODES INC. SMAT70A
(SHORT PIN)
–48V
C2 = (45μA • C
–48V RTN
*
6.49k
549k
10k
1%
1%
1%
R4
R5
R6
3
2
Figure 6a. Inrush Control Circuitry
3
V
UV
OV
EE
1
4
0.02Ω
5%
R1
L
)/I
SENSE
2
INRUSH
5
4
LT4250H
C1
470nF
25V
V
DD
8
IRF530
GATE
Q1
6
R2
10Ω
5%
1k, 5%
R3
100V
PWRGD
15nF
C2
DRAIN
7
1
100μF
100V
C3
0.1μF
100V
C4
+
4250 F06a
V
GATE IN
V
VI-J30-CY
IN
IN
VICOR
+
–
V
V
OUT
OUT
+
–
+
where C
input capacitance.
Capacitor C1 and resistor R3 prevent Q1 from momentarily
turning on when the power pins first make contact. Without
C1 and R3, capacitor C2 would pull the gate of Q1 up to
a voltage roughly equal to V
LT4250 could power up and actively pull the gate low. By
placing capacitor C1 in parallel with the gate capacitance
of Q1 and isolating them from C2 using resistor R3 the
problem is solved. The value of C1 is given by:
where V
V
R3 should not exceed a value that produces an R3 • C2
time-constant of 150μs. A 1k value for R3 will ensure this
for C2 values up to 150nF .
The waveforms are shown in Figure 6b. When the power
pins make contact, they bounce several times. While the
contacts are bouncing, the LT4250 senses an undervoltage
condition and the GATE is immediately pulled low when
the power pins are disconnected.
Once the power pins stop bouncing, the GATE pin starts
to ramp up. When Q1 turns on, the GATE voltage is held
constant by the feedback network of R3 and C2. When the
INMAX
C5
100μF
16V
5V
C1 ≅ 35 • C2 for V
C1=
is the maximum operating input voltage.
L
TH
V
is the total load capacitance = C3 + C4 + module
INMAX
is the MOSFET’s minimum gate threshold and
500mA/DIV
GATE –V
CURRENT
V
INRUSH
10V/DIV
50V/DIV
50V/DIV
TH
DRAIN
Figure 6b. Inrush Control Waveforms
V
EE
EE
V
CONTACT
CONTACT
BOUNCE
TH
BOUNCE
INMAX
• C2+C
(
= 72V
EE
25ms/DIV
• C2/CGS(Q1) before the
GD
)
TURN-ON
MODULE
MODULE
TURN-ON
4250 F06b
4250lhfa