LT1640ALIS8#PBF Linear Technology, LT1640ALIS8#PBF Datasheet - Page 13

• Manufacturer Part Number: LT1640ALIS8#PBF
• Description: IC CONTRLR HOTSWAP NEGVOLT 8SOIC
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LT1640ALIS8#PBF

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: -10 V ~ -80 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Family Name: LT1640AL
• Package Type: SOIC N
• Operating Supply Voltage (min): -10V
• Operating Supply Voltage (max): -80V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
When the DRAIN voltage of the LT1640AL is high with
respect to V
and the PWRGD pin is in a high impedance state (Fig-
ure 12). The PWRGD pin will be pulled high by the module’s
internal pull-up current source, turning the module off.
When the DRAIN voltage drops below V
and the PWRGD pin will pull low, enabling the module.
The PWRGD signal can also be used to turn on an LED or
optoisolator to indicate that the power is good as shown
in Figure 13.
Gate Pin Voltage Regulation
When the supply voltage to the chip is more than 15.5V,
the GATE pin voltage is regulated at 13.5V above V
supply voltage is less than 15.5V, the GATE voltage will be
about 2V below the supply voltage. At the minimum 10V
supply voltage, the gate voltage is guaranteed to be greater
EE
, the internal pull-down transistor Q2 is off
U
U
* DIODES INC. SMAT70A
– 48V
GND
*
GND
W
R4
R5
R6
(SHORT PIN)
3
2
PG
LT1640AL
UV
OV
, Q2 will turn on
3
Figure 12. Active Low Enable Module
+
–
V
4
1
EE
V
U
PG
R1
EE
SENSE
2
. If the
+
–
4
5
GATE
V
C1
DD
6
8
Q1
than 6V. The gate voltage will be no greater than 18V for
supply voltages up to 80V.
Drain Pin Protection
A unique feature of the LT1640A is the ruggedness of the
DRAIN pin. The DRAIN is designed to withstand negative
voltages (with respect to V
nal diode. A short circuit on the – 48V backplane pulls up
the V
ure 12), the DRAIN pin is held more negative than the V
pin. The body diode of Q1, plus the I • R drop across R1 (if
R1 is small), holds the DRAIN pin to less than 1.5V below
V
drain current, which is within the design capability of the
LT1640A. A design with R1 larger than 0.1 may require
a resistor in series with the DRAIN pin to not exceed the
50mA drain current maximum.
R2
EE
PWRGD
DRAIN
R3
. A 1.5V reverse voltage gives rise to a 50mA reverse
V
EE
Q2
EE
C2
pin, but due to the storage capacitor C3 (Fig-
1
7
+
1640A F12
C3
ENABLE MODULE
V
V
ON/OFF
ACTIVE LOW
IN
IN
LT1640AL/LT1640AH
+
–
V
V
OUT
OUT
+
–
EE
) without requiring an exter-
13
EE