LT1640ALCS8#TR Linear Technology, LT1640ALCS8#TR Datasheet - Page 8

• Manufacturer Part Number: LT1640ALCS8#TR
• Description: IC CONTRLR HOTSWAP NEGVOLT 8SOIC
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LT1640ALCS8#TR

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: -10 V ~ -80 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Family Name: LT1640AL
• Package Type: SOIC N
• Operating Supply Voltage (min): -10V
• Operating Supply Voltage (max): -80V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LT1640ALCS8TR

APPLICATIO S I FOR ATIO
LT1640AL/LT1640AH
Capacitor C1 and resistor R3 prevent Q1 from momen-
tarily turning on when the power pins first make contact.
Without C1 and R3, capacitor C2 would pull the gate of Q1
up to a voltage roughly equal to V
the LT1640A could power up and actively pull the gate
low. By placing capacitor C1 in parallel with the gate
capacitance of Q1 and isolating them from C2 using
resistor R3, the problem is solved. The value of C1 should
be:
where V
V
8
INMAX
V
INMAX
is the maximum operating input voltage.
TH
V
TH
is the MOSFET’s minimum gate threshold and
V
TH
U
C
2
U
C
GD
EE
W
• C2/C
CONTACT
GS
BOUNCE
(Q1) before
Figure 6b. Inrush Control Waveforms
U
R3’s value is not critical and is given by (V
5mA.
The waveforms are shown in Figure 6b. When the power
pins make contact, they bounce several times. While the
contacts are bouncing, the LT1640A senses an
undervoltage condition and the GATE is immediately
pulled low when the power pins are disconnected.
Once the power pins stop bouncing, the GATE pin starts to
ramp up. When Q1 turns on, the GATE voltage is held
constant by the feedback network of R3 and C2. When the
DRAIN voltage has finished ramping, the GATE pin then
ramps to its final value.
1640A F07b
INMAX
+ V
GATE
)/