LM5073MH/NOPB National Semiconductor, LM5073MH/NOPB Datasheet - Page 12

• Manufacturer Part Number: LM5073MH/NOPB
• Description: IC POE PD INTERFACE AUX 14-TSSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Power over Ethernet Switch (PoE)r

Specifications of LM5073MH/NOPB

• Applications: Remote Peripherals (Industrial Controls, Cameras, Data Access)
• Internal Switch(s): Yes
• Voltage - Supply: 9 V ~ 70 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP (0.173", 4.40mm Width) Exposed Pad
• Input Voltage: 100V
• Supply Current: 2mA
• Digital Ic Case Style: TSSOP
• No. Of Pins: 14
• Uvlo: 38.5V
• Operating Temperature Range: -40°C To +125°C
• Msl: MSL 1 - Unlimited
• Termination Type: SMD
• Rohs Compliant: Yes
• Filter Terminals: SMD
• For Use With: LM5073HE-EVAL - BOARD EVAL FOR LM5073HELM5073EVAL - BOARD EVALUATION LM5073
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM5073MH

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The nPGOOD pin can also be used to implement a delay timer
by adding a capacitor from the nPGOOD pin to the RTN pin.
This delay timer will prevent the interruption of the DC-DC
converter’s operation in the event of an intermittent loss of
power good status. This can be caused by PoE line voltage
transients that may occur when switching between normal
PoE power and a backup supply (e.g. a battery or UPS). Such
a condition will create a new “hot swap” event if the backup
supply voltage is greater than the PoE supply. Since the hot
swap MOSFET will likely limit current during such a sudden
input voltage change, the nPGOOD pin will momentarily
switch to the high state. A capacitor on this pin will delay the
transition of the nPGOOD pin to provide continuous operation
of the DC-DC converter during such transients. The power
good filter delay time and capacitor value can be selected with
the following equation:
For example, selecting 100 nF for C
be 5 ms. The delay required for continuous operation will de-
pend on the amplitude of the transient, the DC current limit,
the load, and the total amount of input capacitance. The nP-
GOOD delay timer will not guarantee continuous operation if
the hot swap MOSFET is in current limit for an extended pe-
riod, causing a thermal limit condition. This will result in a
complete shutdown of the DC-DC converter, though no ele-
ments in the system will be permanently damaged and normal
operation will resume momentarily.
The power good status also affects the default DC current
limit. Should the sensed drain to source voltage of the hot
swap MOSFET (from RTN to VEE) exceed 2.5V, the LM5073
will increase the DC current limit from the default 440 mA to
800 mA (High DCCL). This higher current limit will speed re-
covery from an input voltage downward step, allowing con-
tinued operation of the PD. This higher current limit will remain
in effect until one of the following events occurs: (i) the power
good status is lost for longer than t
DC-DC converter will be disabled, (ii) the increased power
dissipation in the hot swap MOSFET causes a thermal limit
condition as previously discussed, or (iii) the hot swap MOS-
FET drain to source voltage falls below 1.5V to re-establish
power good status. Note that if the DC current limit has been
programmed externally with R
section), then the DC current limit will remain at the pro-
grammed level even when the power good status is lost.
C
PGOOD
(nF) = 20 x t
DCCL
PG_DELAY
PG_Delay
PGOOD
(see the DC current limit
, the delay time will
, at which time the
(ms)
12
Enabling the External DC-DC
Converter
The LM5073 has complementary active high (SD) and active
low (nSD) shut down outputs that can be used with any DC-
DC converter that has an enable input. When nPGOOD pin
is low (< 2.5V), the SD pin will be in the low state and the nSD
pin will be high impedance. In cases where the pull up internal
to the DC-DC converter is weak, an additional pull-up may be
desirable for better noise immunity. Alternatively, the nSD
output may be connected to the UVLO or Soft Start pins of
the DC-DC converter when a dedicated enable input is not
available. The open drain output will not interfere with normal
operation of the DC-DC converter’s UVLO or Soft-Start.
The external pull-ups for the SD or nSD pins must limit the
voltage at each pin to no more than 16V relative to RTN, and
limit the sink current to 1 mA or less.
Auxiliary Power Options
The LM5073 allows the PD to receive power from auxiliary
sources like AC adapters and solar cells in addition to the PoE
enabled network. This is a desirable feature when the total
system power requirements exceed the PSE’s load capacity.
Furthermore, with the auxiliary power option, the PD can be
used in a standard Ethernet (non-PoE) system.
For maximum versatility, the LM5073 accepts two different
auxiliary power configurations. The first one, shown in
8, is the front auxiliary (FAUX) configuration in which the aux-
iliary source is “diode OR’d” with the voltage available from
the Ethernet connector. The second configuration, shown in
Figure
iliary power bypasses the PoE interface altogether and is
connected directly to the input of the DC-DC converter
through a diode. The FAUX option is desirable if the auxiliary
power voltage is similar to the PoE input voltage. However,
when the auxiliary supply voltage is much lower than the PoE
input voltage, the RAUX option is more favorable because the
current from the auxiliary supply is not limited by the hot swap
MOSFET DC current limit. A comparison of the FAUX and
RAUX options is presented in
RAUX pins are not reverse voltage protected. If the polarity
of the auxiliary supply is not guaranteed, then a series block-
ing diode should be added for reverse polarity protection.
9, is the rear auxiliary (RAUX) option in which the aux-
Table
3. Note the FAUX and
Figure