LTC4242IUHF#PBF Linear Technology, LTC4242IUHF#PBF Datasheet - Page 19

IC CTRLR HOTSWAP DUAL-SLOT 38QFN

LTC4242IUHF#PBF

Manufacturer Part Number
LTC4242IUHF#PBF
Description
IC CTRLR HOTSWAP DUAL-SLOT 38QFN
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Datasheet

Specifications of LTC4242IUHF#PBF

Applications
General Purpose, PCI Express
Internal Switch(s)
No
Voltage - Supply
2.7 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
38-WFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIO S I FOR ATIO
In system board applications, large bypass capacitors
(≥10µF) are recommended at each of the system input
supplies to minimize supply glitches as a result of large
inrush or fault currents.
It is important to put C1, the bypass capacitor for the V
pin as close as possible between the V
Design Example
Consider a PCI Express Hot Swap application example
with the following power supply requirements:
1. Select an R
R
lower circuit breaker threshold limit, ΔV
a PCI Express connector, fi ve pins are allocated for the
12V supply, three pins for the 3.3V supply and one pin for
3.3V
a 1% tolerance is assumed for the sense resistors, then
the following values of resistances should suffi ce:
Table 2. Sense Resistance Values
2. Assume no load current at start-up and the inrush current
charges the load capacitance. Compute gate capacitance
with:
t
With I
Table 1. PCI Express Power Supply Requirements
1
SUPPLY VOLTAGE
VOLTAGE SUPPLY
SENSE
is the time to charge up the load capacitor.
a. For 12V Supply, C
b. For 3.3V Supply, C
C
GATE
AUX
3.3V
GATE(UP)(MAX)
3.3V
3.3V
12V
12V
value based on the maximum load current and the
. The current rating of a connector pin is 1.1A. If
AUX
=
I
GATE UP
SENSE
V
(
OUT
R SENSE (1%)
MAXIMUM SUPPLY
U
= 13µA and t
)
value for each supply. Calculate the
13mΩ
8mΩ
CURRENT
GATE
t
375mA
1
GATE
5.5A
3.0A
U
= 11nF
= 39nF
1
I TRIP(MIN)
= 10ms:
W
5.6A
3.4A
CC
SENSE(CB)(MIN)
MAXIMUM LOAD
CAPACITANCE
and GND pins.
2000µF
1000µF
150µF
I TRIP(MAX)
U
6.9A
4.3A
. In
(2)
CC
So a value of 15nF and 47nF (±10%) should suffi ce for
the 12V and 3.3V supplies respectively. The worst-case
t
Table 3. Worst-Case t
For the internal switch, the slew rate (SR) at the 3.3V
supply output is limited to 1.7V/ms max. The inrush cur-
rent can then be calculated according to:
The inrush current must be lower than 385mA (I
for proper start-up. Assuming a tolerance of 30% for the
load capacitance, the value of C
170µF.
3. Next is the selection of MOSFETs for the 12V and 3.3V
main input supplies. The Si7336ADP’s on resistance is less
than 4mΩ at V
3.3V and 12V main supplies.
Since the maximum load for the 3.3V supply is 3A, the
MOSFET may dissipate up to 36mW. The Si7336ADP
has a maximum junction-to-ambient thermal resistance
of 50°C/W. This gives a junction temperature of 51.8°C
when operating at a case temperature of 50°C. Accord-
ing to the Si7336ADP’s Normalized On-Resistance vs
Junction Temperature curve, the device’s on resistance
can be expected to increase by about 12% over its room
temperature value. Recalculation for steady-state R
and junction temperature yield approximately 4.5mΩ
and 52°C, respectively. The voltage drop across the 3.3V
sense resistor and series MOSFET at 3A and at 50°C PCB
temperature is less than 53mV.
The MOSFET dissipates power during inrush charging of
the output load capacitor. Assuming no load current, the
MOSFET’s dissipated power equals the fi nal load capaci-
tor stored energy. Therefore, average MOSFET dissipated
power is:
1
VOLTAGE SUPPLY
and inrush currents are tabulated in Table 3.
I
P
INRUSH(MAX)
ON
3.3V
12V
=
C
L
2
V
GS
OUT
t
= C
2
1
= 4.5V, 25°C and it is a good choice for
1
LOAD
and Inrush Current
t
13ms
11ms
1(MIN)
• SR
MAX
t
LOAD
40ms
34ms
1(MAX)
should not exceed
LTC4242
MAX I
CBAUX(MIN)
2.4A
0.4A
INRUSH
19
AUX
4242f
(3)
(4)
ON
)

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