CS5463-ISZ Cirrus Logic Inc, CS5463-ISZ Datasheet - Page 11

• Manufacturer Part Number: CS5463-ISZ
• Description: IC ENERGY METERING 1PHASE 24SSOP
• Manufacturer: Cirrus Logic Inc

Specifications of CS5463-ISZ

• Package / Case: 24-SSOP
• Input Impedance: 30 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 0.8V
• Voltage - I/o Low: 0.2V
• Current - Supply: 2.9mA
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Meter Type: Single Phase
• Output Voltage Range: 2.4 V to 2.6 V
• Input Voltage Range: 2.4 V to 2.6 V
• Input Current: 25 nA
• Power Dissipation: 500 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 5.25V
• No. Of Outputs: 3
• Power Dissipation Pd: 500mW
• Supply Voltage Range: 3.3V To 5V
• No. Of Pins: 24
• Filter Terminals: SMD
• Supply Voltage Min: 3.3V
• Rohs Compliant: Yes
• Frequency: 20GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1553 - BOARD EVAL & SOFTWARE CS5463 ADC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1096-5

SWITCHING CHARACTERISTICS
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Notes: 17. Specified using 10% and 90% points on waveform of interest. Output loaded with 50 pF.
DS678F2
Rise Times
(Note 17)
Fall Times
(Note 17)
Start-up
Oscillator Start-up Time
Serial Port Timing
Serial Clock Frequency
Serial Clock
SDI Timing
CS Falling to SCLK Rising
Data Set-up Time Prior to SCLK Rising
Data Hold Time After SCLK Rising
SDO Timing
CS Falling to SDI Driving
SCLK Falling to New Data Bit (hold time)
CS Rising to SDO Hi-Z
Auto-Boot Timing
Serial Clock
MODE setup time to RESET Rising
RESET rising to CS falling
CS falling to SCLK rising
SCLK falling to CS rising
CS rising to driving MODE low (to end auto-boot sequence)
SDO guaranteed setup time to SCLK rising
Min / Max characteristics and specifications are guaranteed over all
Typical characteristics and specifications are measured at nominal supply voltages and TA = 25 °C.
VA+ = 5 V ±5% VD+ = 3.3 V ±5% or 5 V ±5%; AGND = DGND = 0 V. All voltages with respect to 0 V.
Logic Levels: Logic 0 = 0 V, Logic 1 = VD+.
18. Oscillator start-up time varies with crystal parameters. This specification does not apply when using an
external clock source.
Parameter
Any Digital Input Except SCLK
Any Digital Input Except SCLK
XTAL = 4.096 MHz (Note 18)
Any Digital Output
Any Digital Output
Pulse Width High
Pulse Width High
Pulse Width Low
Pulse Width Low
SCLK
SCLK
Symbol
SCLK
Recommended Operating
t
t
t
t
t
t
t
t
t
t
rise
ost
fall
t
t
t
t
t
t
t
t
t
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Min
200
200
100
100
100
50
50
50
48
50
-
-
-
-
-
-
-
-
-
-
-
Typ
50
50
60
20
20
20
16
8
8
8
-
-
-
-
-
-
-
-
-
-
Conditions.
Max
100
100
1.0
1.0
50
50
50
2
-
-
-
-
-
-
-
-
CS5463
MCLK
MCLK
MCLK
MCLK
MCLK
MHz
Unit
ms
µs
µs
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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