MAX1610CSE Maxim Integrated Products, MAX1610CSE Datasheet - Page 6

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MAX1610CSE

Manufacturer Part Number
MAX1610CSE
Description
IC SMD SO16 BACKLGT
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1610CSE

Display Type
CCFL - Cold Cathode Fluorescent Lamp
Interface
2-Wire SMBus
Current - Supply
1.5mA
Voltage - Supply
4.75 V ~ 26 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Configuration
-
Digits Or Characters
-
Other names
146982A

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX1610CSE
Manufacturer:
MAXIM/美信
Quantity:
20 000
Digitally Controlled CCFL Backlight
Power Supplies
6
______________________________________________________________Pin Description
MAX1610
_______________________________________________________________________________________
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
PIN
MAX1611
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
SMBSUS
MINDAC
NAME
SHDN
SYNC
CSAV
BATT
GND
SDA
OTP
SCL
REF
BST
DN
CC
UP
SS
CS
VL
LX
Logic-Level Input. A rising edge on UP increments the 5-bit counter for the 5-bit DAC.
UP = DN = 1 presets the counter to mid-scale.
System Management Bus Serial Data Input and Open-Drain Output
Logic-Level Input. A rising edge on DN decrements the 5-bit counter for the 5-bit DAC.
UP = DN = 1 presets the counter to mid-scale.
System Management Bus Serial Clock Input
Logic-Level Shutdown Input Pin. Applying a logic low to SHDN places the chip in a low-
supply-current shutdown mode.
System Management Bus Suspend Mode Input. SMBSUS Selects one of two chip-
configuration settings, which are preprogrammed serially.
Oscillator Synchronization Input. Tying SYNC to REF sets the oscillator frequency to 290kHz.
Tying SYNC to GND or VL lowers the oscillator frequency to 145kHz.
Soft-Start Pin. A 4µA current source feeds the capacitor placed on SS. The voltage on this
pin limits the peak current in the switch. When the lamp is turned off, SS pulls to GND.
Output of the Voltage-to-Current Converter; Input to the PWM Comparator, which sets the
current limit. A capacitor placed at CC sets the current-regulator-loop bandwidth.
Input to the Voltage-to-Current Converter, which averages the voltage on CSAV using the
capacitor on CC.
The voltage at MINDAC sets the DAC’s minimum-scale output voltage. Tying MINDAC to
VL enables the internal 280Hz current-chopping mode.
2.0V Reference Output. Bypass with 0.1 F to GND.
Open-Tube Protection Comparator. As long as OTP exceeds the reference voltage, the
N-channel BATT-to-LX switch is forced off.
Low-Side Current-Sense Input. The current-mode regulator terminates the switch cycle
when the voltage at CS exceeds REF - CC.
Output of the Internal Linear Regulator. VL can be overdriven by a voltage greater than 4.75V
to operate the chip from +5V ± 5%, and to conserve power. Bypass with 0.1 F to GND.
System Ground
Power Input to the High-Side Gate Driver, which switches the internal N-channel MOSFET
on and off.
Ground Connection for the Internal High-Side Gate Driver; source-connection point for the
internal N-channel MOSFET
4.5V to 25V Battery-Voltage Input Point. Connects to the internal N-channel power MOSFET’s
drain, and to the input of the internal linear regulator that powers the chip.
FUNCTION

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