AD9884AKS-100 Analog Devices Inc, AD9884AKS-100 Datasheet - Page 10

• Manufacturer Part Number: AD9884AKS-100
• Description: IC FLAT PANEL INTERFACE 128-MQFP
• Manufacturer: Analog Devices Inc

Specifications of AD9884AKS-100

• Display Type: LCD
• Interface: Analog
• Current - Supply: 125mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Configuration: -
• Digits Or Characters: -

AD9884A
INPUT GAIN
An 8-bit word that sets the gain of the RED channel. The
AD9884A can accommodate input signals with a full-scale
range of between 0.5 V and 1.0 V p-p. Setting REDGAIN to
255 corresponds to an input range of 1.0 V. A REDGAIN of
0 establishes an input range of 0.5 V. Note that increasing
REDGAIN results in the picture having less contrast (the
input signal uses fewer of the available converter codes). See
Figure 8.
The power-up default value is REDGAIN = 80h.
An 8-bit word that sets the gain of the GREEN channel. See
REDGAIN (02).
The power-up default value is GRNGAIN = 80h.
An 8-bit word that sets the gain of the BLUE channel. See
REDGAIN (02).
The power-up default value is BLUGAIN = 80h.
INPUT OFFSET
A six-bit offset binary word that sets the dc offset of the RED
channel.
One LSB of offset adjustment equals approximately one LSB
change in the ADC offset. Therefore, the absolute magnitude of
the offset adjustment scales as the gain of the channel is changed
(Figure 9). A nominal setting of 31 results in the channel nomi-
nally clamping the back porch (during the clamping interval) to
code 00. An offset setting of 63 results in the channel clamping
to code 31 of the ADC. An offset setting of 0 clamps to code
–31 (off the bottom of the range). Increasing the value of
REDOFST decreases the brightness of the channel.
The power-up default value is REDOFST = 80h.
A six-bit offset binary word that sets the dc offset of the GREEN
channel. See REDOFST (05).
The power-up default value is GRNOFST = 80h.
A six-bit offset binary word that sets the DC offset of the GREEN
channel. See REDOFST (05).
The power-up default value is BLUOFST = 80h.
02
03
04
05
06
07
7–2
7–2
7–0
7–0
7–0
7–2
GRNOFST
BLUOFST
REDGAIN
GRNGAIN
BLUGAIN
REDOFST
Green Channel Offset Adjust
Blue Channel Offset Adjust
Green Channel Gain Adjust
Blue Channel Gain Adjust
Red Channel Offset Adjust
Red Channel Gain Adjust
–10–
CLAMP TIMING
An 8-bit register that sets the position of the internally generated clamp.
When EXTCLMP = 0, a clamp signal is generated internally, at
a position established by CLPLACE and for a duration set by
CLDUR. Clamping is started CLPLACE pixel periods after the
trailing edge of HSYNC. CLPLACE may be programmed to
any value between 1 and 255. CLPLACE = 0 is not supported.
The clamp should be placed during a time that the input signal
presents a stable black-level reference, usually the back porch
period between HSYNC and the image. A value of 08h will
usually work.
When EXTCLMP = 1, this register is ignored.
The power-up default value is CLPLACE = 80h.
An 8-bit register that sets the duration of the internally gener-
ated clamp.
When EXTCLMP = 0, a clamp signal is generated internally, at
a position established by CLPLACE and for a duration set by
CLDUR. Clamping is started CLPLACE pixel periods after the
trailing edge of HSYNC, and continues for CLDUR pixel peri-
ods. CLDUR may be programmed to any value between 1 and
255. CLDUR = 0 is not supported.
For the best results, the clamp duration should be set to include
the majority of the black reference signal time found following
the HSYNC signal trailing edge. Insufficient clamping time can
produce brightness changes at the top of the screen, and a slow
recovery from large changes in the Average Picture Level (APL), or
brightness. A value of 10h to 20h works with most standard signals.
When EXTCLMP = 1, this register is ignored.
The power-up default value is CLDUR = 80h.
08
09
7–0
7–0
CLPLACE
CLDUR
Clamp Placement
Clamp Duration
REV. C