TC7135CBU Microchip Technology, TC7135CBU Datasheet - Page 10

• Manufacturer Part Number: TC7135CBU
• Description: IC ADC 4 1/2DGT 64-MQFP
• Manufacturer: Microchip Technology

Specifications of TC7135CBU

• Display Type: LED
• Configuration: 7 Segment
• Interface: BCD
• Digits Or Characters: A/D 4.5 Digits
• Current - Supply: 1mA
• Voltage - Supply: 4 V ~ 6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-MQFP, 64-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TC7135
FIGURE 5-2:
Outputs.
5.1
When left open, this pin assumes a logic ‘1’ level. With
a RUN/HOLD = 1, the TC7135 performs conversions
continuously, with a new measurement cycle beginning
every 40,002 clock pulses.
When RUN/HOLD changes to a logic ‘0’, the measure-
ment cycle in progress will be completed, with the data
held and displayed as long as the logic ‘0’ condition
exists.
A positive pulse (>300 nsec) at RUN/HOLD initiates a
new measurement cycle. The measurement cycle in
progress when RUN/HOLD initially assumed the logic
‘0’ state must be completed before the positive pulse
can be recognized as a single conversion run
command.
The new measurement cycle begins with a 10,001
count auto-zero phase. At the end of this phase, the
busy signal goes high.
DS21460D-page 10
Underrange when
Overrange when
for Overrange
Applicable
Applicable
Digit Scan
Digit Scan
STROBE
Integrator
RUN/HOLD Input
Output
Busy
Expanded Scale Below
Counts
*
System
10,001
Counts
D5
Zero
100
D4
Full Measurement Cycle
Auto-Zero
D3
D2
D1
Integrate
40,002 Counts
10,000
Counts
(Fixed)
Timing Diagrams For
Signal
* First D5 of System Zero and
Reference Integrate One Count
Longer
Counts (Max)
Reference
Integrate
Integrate
20,001
D5
D4
D3
D2
D1
Signal
*
Reference
Integrate
5.2
During the measurement cycle, the STROBE control
line is pulsed low five times. The five low pulses occur
in the center of the digit drive signals (D
(see
D
measurement cycles end. In the center of the D
101 clock pulses after the end of the measurement
cycle, the first STROBE occurs for one half clock pulse.
After the D
pulses. The STROBE then goes low 100 clock pulses
after D
drive pulse.
The digit drive signals will continue to permit display
scanning. STROBE pulses are not repeated until a new
measurement is completed. The digit drive signals will
not continue if the previous signal resulted in an
overrange condition.
The active-low STROBE pulses aid BCD data transfer
to UARTs, processors and external latches. For more
information, please refer to Application Note 784
(DS00784).
FIGURE 5-3:
Times Per Conversion.
STROBE
5
B1 B8
TC7135
Outputs
*Delay between Busy going Low and First STROBE pulse is
Busy
dependent on Analog Input.
(MSD) goes high for 201 counts when the
Figure
D5
D4
D3
D2
D1
4
goes high. This continues through the D
*
STROBE Output
Counts
(MSD)
5
Data
5-3).
201
D5
digit strobe, D
End of Conversion
Counts
200
Counts
Data
200
D4
Strobe Signal Low Five
© 2007 Microchip Technology Inc.
Counts
Data
200
D3
4
goes high for 200 clock
Counts
Data
200
D2
Counts
(LSD)
Data
200
D1
1
, D
Note Absence
of STROBE
2
Counts
, D
Data
200
D5
5
pulse,
1
3
, D
digit
5
)