TC7136ACPL Microchip Technology, TC7136ACPL Datasheet - Page 9

• Manufacturer Part Number: TC7136ACPL
• Description: IC ADC 3 1/2DGT LOW PWR 40-DIP
• Manufacturer: Microchip Technology

Specifications of TC7136ACPL

• Display Type: LCD
• Configuration: 7 Segment
• Digits Or Characters: A/D 3.5 Digits
• Current - Supply: 70µA
• Voltage - Supply: 9V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Interface: -

3.0
(All Pin Designations Refer to 40-Pin PDIP.)
3.1
The TC7136/A is a dual slope, integrating analog-to-
digital converter. An understanding of the dual slope
conversion technique will aid in following detailed
TC7136/A operational theory.
The conventional dual slope converter measurement
cycle has two distinct phases (see Figure 3-1).
1.
2.
The input signal being converted is integrated for a
fixed time period (t
pulses. An opposite polarity constant reference voltage
is then integrated until the integrator output voltage
returns to zero. The reference integration time is
directly proportional to the input signal (t
In a simple dual slope converter, a complete conver-
sion requires the integrator output to "ramp up" and
"ramp down."
A simple mathematical equation relates the input
signal, reference voltage, and integration time:
EQUATION 3-1:
For a constant V
EQUATION 3-2:
© 2005 Microchip Technology Inc.
Where:
Reference voltage integration (de-integration)
Input signal integration
V
t
t
SI
RI
DETAILED DESCRIPTION
Dual Slope Conversion Principles
R
-------- -
RC
1
= Reference voltage
= Signal integration time (fixed)
= Reference voltage integration time
∫
(variable)
t SI
0
IN
V IN
:
V
SI
IN
), measured by counting clock
=
t ( ) t
d
V R
=
t
------- -
t SI
RI
V R t RI
------------
RC
RI
).
FIGURE 3-1:
FIGURE 3-2:
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values, as long as
they are stable during a measurement cycle. Noise
immunity is an inherent benefit. Noise spikes are inte-
grated or averaged to zero during integration periods.
Integrating ADCs are immune to the large conversion
errors that plague successive approximation convert-
ers in high noise environments. Interfering signals with
frequency components at multiples of the averaging
period will be attenuated. Integrating ADCs commonly
operate with the signal integration period set to a
multiple of the 50Hz/60Hz power line period.
Analog Input
Signal
Voltage
30
20
10
REF
0
Integrate
0.1/t
Signal
Fixed
Time
TC7136/TC7136A
Polarity Control
Variable
Reference
Integrate
Time
Display
Switch
Driver
Integrator
Input Frequency
C
–
+
BASIC DUAL SLOPE
CONVERTER
NORMAL MODE
REJECTION OF DUAL
SLOPE CONVERTER
INT
V
V
Phase
Control
IN
IN
≈ 1/2 V
≈ V
1/t
t = Measured Period
REF
–
+
REF
Comparator
Control
Logic
DS21461C-page 9
Counter
Clock
10/t