ICL7126CPL Intersil, ICL7126CPL Datasheet - Page 2

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ICL7126CPL

Manufacturer Part Number
ICL7126CPL
Description
IC ADC 3.5 DIGIT LCD LP 40-DIP
Manufacturer
Intersil
Datasheet

Specifications of ICL7126CPL

Display Type
LCD
Configuration
7 Segment
Digits Or Characters
A/D 3.5 Digits
Current - Supply
70µA
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Supply
-
Interface
-
Other names
ICL7126CPLIS

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Electrical Specifications
NOTES:
Absolute Maximum Ratings
Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
Analog Input Voltage (Either Input) (Note 1) . . . . . . . . . . . . .V+ to V-
Reference Input Voltage (Either Input) . . . . . . . . . . . . . . . . .V+ to V-
Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TEST to V+
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
SYSTEM PERFORMANCE
Zero Input Reading
Ratiometric Reading
Rollover Error
Linearity
Common Mode Rejection Ratio
Noise
Leakage Current Input
Zero Reading Drift
Scale Factor Temperature Coefficient
V+ Supply Current
COMMON Pin Analog Common Voltage
Temperature Coefficient of Analog Common
Peak-To-Peak Segment Drive Voltage
Peak-To-Peak Backplane Drive Voltage
Power Dissipation Capacitance
3. Unless otherwise noted, specifications are tested using the circuit of Figure 1.
4. Back plane drive is in phase with segment drive for ‘off’ segment, 180 degrees out of phase for ‘on’ segment. Frequency is 20 times conversion
5. Not tested, guaranteed by design.
1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.
2. θ
rate. Average DC component is less than 50mV.
JA
is measured with the component mounted on an evaluation PC board in free air.
PARAMETER
2
T
A
= 25
o
C, V
-V
25kΩ Between Common and Positive Supply
V
V
Difference in Reading for Equal Positive and Negative
Inputs Near Full Scale
Full Scale = 200mV or Full Scale = 2V Maximum Deviation
from Best Straight Line Fit (Note 5)
V
V
(Peak-To-Peak Value Not Exceeded 95% of Time) (Note 5)
V
V
V
(Ext. Ref. 0ppm/×
V
(With Respect to + Supply)
25kΩ Between Common and Positive Supply
(With Respect to + Supply) (Note 5)
V+ = to V- = 9V (Note 4)
vs Clock Frequency
REF
CM
IN
lN
IN
lN
lN
IN
IN
IN
= 0.0V, Full Scale = 200mV
= V
= 0V, Full Scale = 200mV
= 0V (Note 5)
= 0V, 0
= 199mV, 0
= 0V (Does Not Include COMMON Current)
= +V
= ±1V, V
= 100mV, f
REF
o
lN
C to 70
o C To
, V
≅ 200mV
IN
REF
= 0V, Full Scale = 200mV (Note 5)
o C To
CLOCK
70
o
o
ICL7126
C
TEST CONDITIONS
C) (Note 5)
= 100mV
o
C (Note 5)
70
= 48kHz (Notes 1, 3)
o
C
,
Thermal Information
Thermal Resistance (Typical, Note 2)
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150
Maximum Storage Temperature Range . . . . . . . . . . -65
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
NOTE: Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
-000.0
MIN
999
2.4
4
-
-
-
-
-
-
-
-
-
-
999/100
±000.0
TYP
±0.2
±0.2
0.2
3.0
5.5
50
15
70
80
40
0
1
1
+000.0
MAX
1000
100
3.2
±1
±1
10
1
5
6
-
-
-
-
o
θ
C to 150
JA
Reading
Reading
FN3084.5
ppm/
ppm/
Counts
Counts
UNITS
Digital
Digital
(
µV/
50
µV/V
o
µV
pA
µA
pF
C/W)
V
V
o
o
o
o
o
o
C
C
C
C
C
C

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