HCPL-8100 Avago Technologies US Inc., HCPL-8100 Datasheet
HCPL-8100
Specifications of HCPL-8100
Related parts for HCPL-8100
HCPL-8100 Summary of contents
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... The HCPL-8100 and HCPL-0810 are specified for operation over extended temperature range from -40°C to +85°C. The HCPL-8100 is available in DIP-8 package, and the HCPL-0810 is available in SO-8 package. Connection Diagram STATUS ...
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... ACPL-0810-500E to order product of SO-8 package in Tape and Reel packaging and RoHS compliant. Example : HCPL-8100-000E to order product of 300mil DIP-8 package in Tube packaging and RoHS compliant. Option datasheets are available. Contact your Avago sales representative or authorized distributor for information. Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 001 and RoHS compliant option will use ‘ ...
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... Package Outline Drawings HCPL-8100 Standard 8-pin DIP package ± 9.50 0.05 ± (0.374 0.002 8100 YYWW 1.524 (0.060) MAX. 1.19 (0.047) MAX. ± 1.094 0.320 0.555 (0.022) MAX. ± (0.037 0.013) 2.54 0.25 (0.100 0.010) DIMENSIONS IN MILLIMETERS AND (INCHES) HCPL-0810 Small Outline SO-8 Package ...
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Recommended Pb-free IR Profile 250 ° C 217 ° C 200 ° C 150 ° ° 150 sec Time (sec) Note: Non-halide flux should be used Absolute Maximum Ratings Parameter Storage Temperature Ambient Operating Temperature ...
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... Distortion 3rd Harmonic HD3 Distortion Output Current Thermal Resistance JA (HCPL-8100) Thermal Resistance q JA (HCPL-0810) Notes: 1. Threshold of falling V with hysteresis of 0. V (typ.). CC . Threshold of rising junction temperature with hysteresis of 0°C (typ.). 3. See Application Information section for more information on the load detection feature. ...
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Performance Plots Unless otherwise noted, all typical plots are Tx-en 2 ref = 8 k© ref = 8 k© kΩ ref R ref = 12 ...
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HD2 HD2 HD2 - -64 HD3 HD3 HD3 - - ref = 8 k© kΩ ref R ref = 12 k© ...
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... HCPL-8100/0810 R ref 24 k Ω Figure 14. Gain bandwidth product test circuit Ω atus -in 100 Ω ref R PULSE GEN. HCPL-8100/0810 ref 24 k Ω PULSE ≤ 1 kHz f PULSE Figure 15. Tx enable/disable time test circuit Ω 1 Status Tx -out x- 1. -in GND 10 k Ω ...
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... TX PLM 100 nF Transceiver 24 kΩ Figure 17. Schematic of HCPL-8100 or HCPL-0810 application for FSK modulation scheme. Line Driver The line driver is capable of driving powerline load imped- ances with output signals the line driver is controlled externally via a resistor R connected from pin 4 to ground. The optimum biasing point value for modulation frequencies up to 150 kHz ...
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... Tx-en input (pin ) to logic low state. External Transient Voltage Protection To protect the HCPL-8100 and HCPL-0810 from high voltage transients caused by power surges and discon- necting/connecting the modem necessary to add an external 6.8 V bi-directional transient voltage protector (as component D1 shown in Figure 17) ...