MAX17006BETP+ Maxim Integrated Products, MAX17006BETP+ Datasheet - Page 17

• Manufacturer Part Number: MAX17006BETP+
• Description: IC BATT CHARGER 1.2MHZ 20-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17006BETP+

• Function: Charge Management
• Battery Type: Multi-Chemistry
• Voltage - Supply: 8 V ~ 26 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The DHI and DLO outputs are optimized for driving
moderate-sized power MOSFETs. The MOSFET drive
capability is the same for both the low-side and high-
sides switches. This is consistent with the variable duty
factor that occurs in the notebook computer environ-
ment where the battery voltage changes over a wide
range. There must be a low-resistance, low-inductance
path from the DLO driver to the MOSFET gate to pre-
vent shoot-through. Otherwise, the sense circuitry in the
MAX17005B/MAX17006B interpret the MOSFET gate as
off while there is still charge left on the gate. Use very
short, wide traces measuring 10 to 20 squares or fewer
(1.25mm to 2.5mm wide if the MOSFET is 25mm from
the device).
The high-side driver (DHI) swings from LX to 5V above
LX (BST) and has a typical impedance of 1.5Ω sourc-
ing and 0.8Ω sinking. The strong high-side MOSFET
driver eliminates most of the power dissipation due to
switching losses. The low-side driver (DLO) swings
from LDO to ground and has a typical impedance of 3Ω
sinking and 3Ω sourcing. This helps prevent DLO from
being pulled up when the high-side switch turns on due
to capacitive coupling from the drain to the gate of the
low-side MOSFET. This places some restrictions on the
MOSFETs that can be used. Using a low-side
MOSFET with smaller gate-to-drain capacitance can
prevent these problems.
Choose the n-channel MOSFETs according to the maxi-
mum required charge current. The MOSFETs must be
able to dissipate the resistive losses plus the switching
losses at both V
For the high-side MOSFET, the worst-case resistive
power losses occur at the maximum battery voltage
and minimum supply voltage:
Generally, a low gate-charge high-side MOSFET is pre-
ferred to minimize switching losses. However, the
R
pation often limits how small the MOSFET can be. The
optimum occurs when the switching losses equal the
conduction losses. High-side switching losses do not
usually become an issue until the input is greater than
approximately 15V. Calculating the power dissipation in
N1 due to switching losses is difficult since it must
allow for difficult quantifying factors that influence the
DS(ON)
PD
COND
required to stay within package power dissi-
(
HighSide
DCIN(MIN)
______________________________________________________________________________________
)
=
V
V
CSIN MAX
DCIN MIN
and V
Design Procedure
(
(
MOSFET Selection
DCIN(MAX)
)
)
MOSFET Drivers
×
I
CHG
2
.
× × R
DS ON
(
High-Performance Chargers
)
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including a verifica-
tion using a thermocouple mounted on N1:
where t
calculated as follows:
I
current (3Ω sourcing and 0.8Ω sinking, typically). The
MAX17005B/MAX17006B/MAX17015B control the
switching frequency as shown in the Typical Operating
Characteristics .
The following is the power dissipated due to high-side
n-channel MOSFET’s output capacitance (C
The following high-side MOSFET’s loss is due to the
reverse-recovery charge of the low-side MOSFET’s
body diode:
Ignore PD
to a low-side MOSFET.
The total high-side MOSFET power dissipation is:
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied. If the high-side MOSFET chosen
for adequate R
hot when biased from V
another MOSFET with lower parasitic capacitance.
For the low-side MOSFET (N2), the worst-case power
dissipation always occurs at maximum input voltage:
GSRC
PD
PD
COND
and I
t
TRANS
TRANS
PD
SW
PD
QRR
1.2MHz, Low-Cost,
PD
TOTAL
(
( )
GSNK
LS
HS
CRSS
QRR
(HS) if a Schottky diode is used parallel
is the drivers transition time and can be
=
DS(ON)
) =
=
⎛
⎝ ⎜
(
I
(
(
HS
⎛
⎜
⎝
GSRC
HS
2
HS
1
are the peak gate-drive source/sink
1-
1
×
)
) ≈
) =
+
V
≈
t
V
at low-battery voltages becomes
TRANS
CSSP MAX
CSIN MIN
PD
PD
+
V
Q
DCIN(MAX)
2
I
RR
COND
CRSS
GSNK
CSSP
(
(
1
2
×
×
V
(
)
(
HS
)
⎞
⎠ ⎟
V
×
CSSP
HS
⎞
⎟ ×
⎠
CSSP
2
×
C
2
)
, consider choosing
(
)
RSS
+
Q
I
+
CH
PD
×
GD
PD
×
G G
I
×
CHG
QRR
f
2
SW
SW
+
f
SW
×
Q
RSS
(
R
×
HS
(
GS
HS
DS ON
f
SW
)
):
)
(
)
)
17