MAX8934AETI+ Maxim Integrated Products, MAX8934AETI+ Datasheet - Page 28

IC BATTERY CHARGER DUAL 28TQFN

MAX8934AETI+

Manufacturer Part Number
MAX8934AETI+
Description
IC BATTERY CHARGER DUAL 28TQFN
Manufacturer
Maxim Integrated Products
Series
Smart Power Selector™r
Datasheet

Specifications of MAX8934AETI+

Function
Charge Management
Battery Type
Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
Voltage - Supply
4.1 V ~ 6.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TQFN Exposed Pad
Product
Charge Management
Output Voltage
1 V
Operating Supply Voltage
4.1 V to 6.6 V
Supply Current
1 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Charge Safety Timers
Yes
Mounting Style
SMD/SMT
Temperature Monitoring
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
**For safety region 2, contact factory.
†For thermistor Beta = 3477, contact factory.
Dual-Input Linear Chargers, Smart Power Selector
with Advanced Battery Temperature Monitoring
The ultra-low quiescent current LDO is always on and is
preset to an output voltage of 3.3V. The LDO provides
up to 30mA output current. When DC and USB are inval-
id and the battery is discharging, the LDO output volt-
age tracks V
capacitor connected from LDO to GND is recommended
for most applications.
Table 3. Package Thermal Characteristics
28
MAX8934AETI+
MAX8934BETI+
MAX8934CETI+
MAX8934DETI+
MAX8934EETI+
Continuous
Dissipation
Power
_____________________________________________________________________________________
B
B
TOP VIEW
JA
JC
PART
CHG
DOK
UOK
SYS
SYS
FLT
OT
SYS
SINGLE-LAYER PCB
1666.7mW
(derate 20.8mW/NC
above +70NC)
48NC/W
3NC/W
*EXPOSED PAD
22
23
24
26
27
28
25
as it drops below 3.3V. A 1FF ceramic
21
28-PIN 4mm x 4mm THIN QFN
1
20
REGION**
2
SAFETY
THIN QFN
MAX8934A–
19
3
MAX8934E
1
1
1
1
1
Pin Configuration
18
4
17
5
Always-On LDO
*EP
MULTILAYER PCB
2286mW
(derate 28.6mW/NC
above +70NC)
35NC/W
3NC/W
16
6
SYS VOLTAGE (V)
15
7
14 THM
13 GND
12
11
10
9
8
4.35
4.35
4.35
4.35
5.3
USUS
ISET
CT
GND
V
L
THERMISTOR
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PROCESS: BiCMOS
Good design minimizes ground bounce and voltage
gradients in the ground plane. GND should connect to
the power-ground plane at only one point to minimize the
effects of power-ground currents. Battery ground should
connect directly to the power-ground plane. Connect
GND to the exposed pad directly under the IC. Use mul-
tiple tightly spaced vias to the ground plane under the
exposed pad to help cool the IC. Position input capaci-
tors from DC, SYS, BATT, and USB to the power-ground
plane as close as possible to the IC. Keep high current
traces such as those to DC, SYS, and BATT as short and
wide as possible. Refer to the MAX8934 Evaluation Kit
for a suitable PCB layout example.
MAX8934BETI+
MAX8934CETI+
MAX8934DETI+
MAX8934EETI+
BETA†
3964
3477
3964
3477
3477
PART
TOP-OFF TIMER
60min
60min
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
TEMP RANGE
15s
15s
15s
Ordering Information
PCB Layout and Routing
Chip Information
Selector Guide
USB INPUT CURRENT
PIN-PACKAGE
28 Thin QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
28 Thin QFN-EP*
LIMIT (max)
500mA
500mA
500mA
500mA
1.5A

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