MAX8900BEWV+T Maxim Integrated Products, MAX8900BEWV+T Datasheet - Page 31

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MAX8900BEWV+T

Manufacturer Part Number
MAX8900BEWV+T
Description
IC LI-ION/POLY BATT CHRGR 30WLP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8900BEWV+T

Function
Battery Monitor
Battery Type
Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
Voltage - Supply
3.4 V ~ 8.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
30-WLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
impedance), the voltage spike could be twice that of
the nominal source voltage. In other words, a 6V source
with a high-Q LC tank circuit in the cabling can result in
a voltage spike as high as 12V. The MAX8900_’s high
input absolute maximum voltage rating of +22V to -22V
eliminates any concerns about the voltage spikes due to
inductive kicking for many applications.
In the event that an application may see a high-Q LC
tank circuit in the cabling for a supply that is > +11V, a
resistor (R
the Q of the tank circuit. The resistor value can be found
experimentally by assuming the parasitic inductance
(L
ing equation give a good starting value for R
An alternative method for estimating L
the frequency of the input voltage spike ringing and then
calculate L
The MAX8900_ provides for a +22V absolute maximum
positive input voltage and a -22V absolute maximum
negative input voltage. Excursions to the absolute maxi-
mum voltage levels should be on a transient basis only,
but can be withstood by the MAX8900_ indefinitely.
Situations that typically require extended input voltage
ratings include but are not limited to the following:
U Inductive kick
U Charge source failure
U Power surge
U Improperly wired wall adapter
U Improperly set universal wall adapter
U Wall adapter with the correct plug, but wrong voltage
U Home-built computer with USB wiring harness con-
U USB connector failure
U Excessive ripple voltage on a switch-mode wall charger
Rating and JEITA Battery Temperature Monitoring
PAR
Overvoltage and Reverse Input Voltage Protection
nected backwards (negative voltage)
) of the input cabling is 1FH/m, then use the follow-
1.2A Switch-Mode Li+ Chargers with ±22V Input
IN
PAR
) must be added in series with C
from the following equation.
L
PAR
R
IN
=
= ×
(
2
2
× π ×
L
f
C
1
R
PAR
IN
)
×
C
IN
PAR
is to measure
IN
IN
to reduce
:
U USB powered hub that is powered by a wall charger
U Unregulated charger (passively regulated by the
U Automotive environment (9V, 12V, any of the afore-
The MAX8900_ WLP package and bump configuration
allows for a small-size low-cost PCB design. Figures 3
and 14 show that the MAX8900_ package’s 30 bumps
are combined into 18 functional nodes. The bump con-
figuration places all like nodes adjacent to each other to
minimize the area required for routing. The bump con-
figuration also allows for a layout that does not use any
vias within the WLP bump matrix (i.e., no micro vias). To
utilize this no via layout, CEN is left unconnected and the
STAT3 pin is not used (2-pin status version).
Figure 15 shows the recommended land pattern for the
MAX8900_. Figure 16 shows the cross section of the
MAX8900_’s bump with detail of the under-bump metal
(UBM). The diameter of each pad in the land pattern is
close to the diameter of the UBM. This land pattern to
UBM relationship is important to get the proper reflow of
each solder bump.
Underfill is not necessary for the MAX8900_’s pack-
age to pass the JESD22-B111 Board Level Drop Test
Method for Handheld Electronic Products. JESD22-B111
covers end applications such as cell phones, PDAs,
cameras, and other products that are more prone to
being dropped during their lifetime due to their size and
weight. Please consider using underfill for applications
that require higher reliability than what is covered in the
JESD22-B111 standard.
Careful printed circuit layout is important for minimizing
ground bounce and noise. Figure 14 is an example layout
of the critical power components for the MAX8900_. The
arrangement of the components that are not shown in
Figure 14 is less critical. Refer to the MAX8900 Evaluation
Kit for a complete PCB layout example. Use the following
list of guidelines in addition to Application Note 1891:
Wafer-Level Packaging (WLP) and Its Applications
maxim-ic.com/ucsp) to layout the MAX8900_ PCB.
(typically through a barrel connector) that has any of
the aforementioned issues
turns ratio of the magnetic’s turns ratio)
mentioned in reverse).
PCB Layout
(www.
31

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