ISL9217IRZ Intersil, ISL9217IRZ Datasheet - Page 17

• Manufacturer Part Number: ISL9217IRZ
• Description: IC MULTI-CELL LI-ION PROT 24-QFN
• Manufacturer: Intersil

Specifications of ISL9217IRZ

• Function: Battery Monitor
• Battery Type: Lithium-Ion (Li-Ion)
• Voltage - Supply: 9.2 V ~ 31 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BIT 3
BIT
5:2
BITS
AO3
7
6
1
0
5:4
7
6
0
0
0
0
0
0
0
0
1
1
1
1
SLEEP
Force Sleep
LDMONEN
Turn on VMON
connection
(ISL9216 only)
CFET
(ISL9216 only)
DFET
(ISL9216 only)
RESERVED
FUNCTION
UFLG1
User Flag 1
UFLG0
User Flag 0
RESERVED
BIT 2
AO2
0
0
0
0
1
1
1
1
0
0
x
1
FUNCTION
BIT 1
AO1
Setting this bit to “1” forces the device to go into a sleep condition. This turns off both FET outputs, the cell balance
outputs and the voltage regulator. This also resets the CFET, DFET, and CB7ON:CB1ON bits. The SLEEP bit is
automatically reset to “0” when the device wakes up. This does not reset the AO3:AO0 bits.
Writing a “1” to this bit turns on the VMON circuit. Writing a “0” to this bit turns off the VMON circuit. As such, the
microcontroller has full control of the operation of this circuit.
Reserved for future expansion.
Setting this bit to “1” turns on the charge FET.
Setting this bit to “0” turns off the charge FET.
This bit is automatically reset in the event of a charge overcurrent condition, unless the automatic response is disabled
by the DENOCC bit.
Setting this bit to “1” turns on the discharge FET.
Setting this bit to “0” turns off the discharge FET.
This bit is automatically reset in the event of a discharge overcurrent or discharge short circuit condition, unless the
automatic response is disabled by the DENOCD or DENSCD bits.
0
0
1
1
0
0
1
1
0
0
1
x
17
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO turns off.
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO turns off.
Reserved for future expansion
BIT 0
AO0
TABLE 5. ANALOG OUT CONTROL REGISTER (ADDR: 03H)
0
1
0
1
0
1
0
1
0
1
x
x
TABLE 6. FET CONTROL REGISTER (ADDR: 04H)
No Output (low power state)
VCELL1
VCELL2
VCELL3
VCELL4
VCELL5
VCELL6
VCELL7
External Temperature
Internal Temperature
Reserved
Reserved
ISL9216, ISL9217
DESCRIPTION
DESCRIPTION
OUTPUT VOLTAGE
November 2, 2007
FN6488.1