AT88SA100S-TSU-T Atmel, AT88SA100S-TSU-T Datasheet - Page 12

• Manufacturer Part Number: AT88SA100S-TSU-T
• Description: IC BATTERY AUTHENTICATION SOT23-
• Manufacturer: Atmel
• Series: CryptoAuthentication™r
• Type: Battery Authentication Chipr

Specifications of AT88SA100S-TSU-T

• Function: Battery Authentication
• Voltage - Supply: 2.7 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: TO-236-3, SC-59, SOT-23-3
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: 1 Wire
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 1
• Program Memory Size: 72 bit
• Program Memory Type: ROM
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 3
• Mounting: Surface Mount
• Case Length: 2.9mm
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.4.1. IO Timeout
4.4.2. Synchronization Procedures
4.5.
12
After a leading transition for any data token has been received, the Atmel
bits of the token to be properly received by the chip within the t
transmission of an illegal token (a low pulse exceeding t
t
The same timeout applies during the transmission of the command block. After the transmission of a legal
command flag, the IO Timeout circuitry is enabled until the last expected data bit is received.
Note:
In order to limit the active current if the AT88SA100S is inadvertently awakened, the IO Timeout circuitry is also
enabled when the AT88SA100S receives a wake-up. If the first token does not come within the t
then the AT88SA100S will go back to the sleep mode without performing any operations.
The IO Timeout circuitry is disabled when the chip is busy executing a command.
When the system and the AT88SA100S fall out of synchronization, the system will ultimately end up sending a
Transmit flag which will not generate a response from the AT88SA100S. The system should implement its own
timeout which waits for t
the system should send a Wake token and after t
resynchronization was successful.
It may be possible that the system does not get the 0x11 code from the AT88SA100S for one of the following
reasons:
1. The system did not wait a full t
2. The Atmel AT88SA100S went into the sleep mode for some reason while the system was transmitting data. In
3. There is some internal error condition within the Atmel AT88SA100S which will be automatically reset after a
Watchdog Failsafe
After the Wake token has been received by the AT88SA100S, a watchdog counter is started within the chip. After
t
and/or whether some IO transmission is in progress. There is no way to reset the counter other than to put the
chip to sleep and wake it up again.
This is implemented as a fail-safe so that no matter what happens on either the system side or inside the various
state machines of the AT88SA100S including any IO synchronization issue, power consumption will fall to the low
sleep level automatically.
Atmel AT88SA100S
TIMEOUT
WATCHDOG
have interpreted the Wake token and Transmit flag as a data bits. Recommended resolution is to wait twice
the t
this case, the Atmel AT88SA100S will interpret the next data bit as a Wake token, but ignore some of the
subsequently transmitted bits during its wake-up delay. If any bytes are transmitted after the wake-up delay,
they may be interpreted as a legal flag, though the following bytes would not be interpreted as a legal
command due to an incorrect count or the lack of a correct CRC. Recommended resolution is to wait the
t
t
leave the IO pin idle for this interval and issue the Wake token.
TIMEOUT
WATCHDOG
interval.
The timeout counter is reset after every legal token, so the total time to transmit the command may exceed the
t
TIMEOUT
TIMEOUT
, the chip will enter sleep mode, regardless of whether it is in the middle of execution of a command
delay and re-issue the Wake token.
interval, see below. There is no way to externally reset the Atmel AT88SA100S – the system should
interval while the time between bits may not
delay and re-issue the Wake token.
TIMEOUT
during which time the AT88SA100S should go to sleep automatically. At this point,
TIMEOUT
delay with the IO signal idle in which case the Atmel AT88SA100S may
WLO
+ t
WHI
ZLO
, a Transmit token. The 0x11 status indicates that the
) will cause the chip to enter the sleep state after the
TIMEOUT
interval. Failure to send enough bits or the
®
AT88SA100S will expect the remaining
TIMEOUT
8558E–SMEM–8/10
interval,