NCP1201D60R2 ON Semiconductor, NCP1201D60R2 Datasheet - Page 14

• Manufacturer Part Number: NCP1201D60R2
• Description: IC CTRLR PWM CM OTP 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1201D60R2

• Output Isolation: Isolated
• Frequency Range: 52 ~ 72kHz
• Voltage - Input: 12.5 ~ 16 V
• Voltage - Output: 500V
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Outputs: 1
• Duty Cycle (max): 83 %
• Output Voltage: - 0.3 V to + 6.5 V
• Output Current: 250 mA
• Mounting Style: SMD/SMT
• Switching Frequency: 60 KHz
• Operating Supply Voltage: - 0.3 V to + 16 V
• Maximum Operating Temperature: + 150 C
• Fall Time: 41 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 116 ns
• Synchronous Pin: No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: NCP1201D60R2OS

Power Dissipation
through the internal DSS circuitry. The average current
flowing through the DSS is therefore the direct image of the
NCP1201 current consumption. The total power dissipation
can be evaluated using:
device operates on a 250 VAC rail, the maximum rectified
voltage can go up to 350 VDC. At T
for the 60 kHz version over a 1.0 nF capacitive load. As a
result, the NCP1201 will dissipate 350 V x 2.1 mA =
735 mW (T
junction- -to- -ambient thermal resistance R
Adding some copper area around the device pins will help
to improve this number, 12mm x 12mm copper can drop
R
or 6.5mm x 6.5mm with 70 m copper thickness (2 oz.). With
this later number, we can compute the maximum power
dissipation the package accepts at an ambient of 50C:
which is acceptable with our previous thermal budget. For
the DIP8 package, adding a min- -pad area of 80mm
copper (1 oz.), R
In the above calculations, I
capacitor. As seen before, I
Fault Protection
controlled (e.g. wall adapters delivering raw DC level), it is
often required to permanently latchoff the power supply in
presence of a fault. This fault can be either a short- -circuit on
the output or a broken optocoupler. In this later case, it is
important to quickly react in order to avoid a lethal output
voltage runaway. The NCP1201 includes a circuitry tailored
to tackle both events. A short- -circuit forces the output
voltage to be at a low level, preventing a bias current to
circulate in the optocoupler LED. As a result, the FB pin
level is pulled up to 4.2 V, as internally imposed by the IC.
The peak current set- -point goes to the maximum and the
supply delivers a rather high power with all the associated
effects. However, this can also happen in case of feedback
loss, e.g. a broken optocoupler. To account for those
P max =
θJ- -A
The NCP1201 can be directly supplied from the DC rail
In applications where the output current is purposely not
down to 100C/W with 35 m copper thickness (1 oz.)
T jmax --T Amax
A
R θJ--A
= 25_C). The SOIC- -8 package offers a
θJ- -A
Figure 33. A Method to Shut Down the Device Without a Definitive Latchoff State
drops from 100C/W to about 75C/W.
= 750 mW
(V HVDC − 11 V) × I CC2
CC2
CC2
is based on a 1.0 nF output
A
will depend on your
= 25C, I
(T
ON/OFF
Jmax
θJ- -A
APPLICATION INFORMATION
CC2
of 178C/W.
= 125_C),
= 2.1 mA
2
. If the
of 35 m
http://onsemi.com
14
MOSFET’s Q
calculation should thus account for the total gate- -charge Q
your MOSFET will exhibit.
V
used. As a result, it will drop the average input voltage and
lower the dissipation to
Alternatively, an auxiliary winding can be used to disable
the DSS and hence reduce the power consumption down to
V
the rectified auxiliary voltage should permanently stays
above the V
is safely kept well below the 16 V maximum rating for
whole operating conditions.
Non- -Latching Shutdown
temporarily and authorize its restart once the control signal
has disappeared. This option can easily be accomplished
through a single NPN bipolar transistor wired between FB
and ground. By pulling FB pin voltage below the V
level, the output pulses are disabled as long as FB pin
voltage is pulled below the skip mode threshold voltage. As
soon as FB pin is released, the the device resumes its normal
operation again. Figure 33 depicts an application example.
situations, NCP1201 included a dedicated overload
protection circuitry. Once the protection activated, the
circuitry permanently stops the pulses while the V
between 10- -12 V to maintain this latchoff state. The system
resets when the user purposely cycles the V
3.0 V, e.g. when the power plug is removed from the mains.
as the error flag is asserted, irrespective to the V
However, to avoid false triggers during the startup sequence,
NCP1201 purposely omits the very first V
12 to 10 V. The error circuitry is actually armed just after this
sequence, e.g. V
timing sequence. The V
carefully to offer a sufficient time out during the first startup
V
CC
CC
CC
If the power estimation is beyond the limit, supply to the
In some cases, it might be desirable to shut off the device
In NCP1201, the controller stops all output pulses as soon
x I
descent.
with a series diode as suggested in Figure 28 can be
CC2
Q1
. By using the auxiliary winding supply method,
CCOFF
g
which I
CC
threshold voltage, keeping DSS off and
crossing 10 V. Figure 34 details the
1
2
3
4
350 V × 2
CC
CC2
capacitor should be calculated
π
 I
CC1
× 1.6 mA = 356.5 mW
8
7
6
5
+ F
CC
sw
CC
descent from
x Q
down below
CC
CC
g
. Final
moves
level.
SKIP
g
.