DP8421AV-20 National Semiconductor, DP8421AV-20 Datasheet - Page 39

• Manufacturer Part Number: DP8421AV-20
• Description: IC CTRLR/DVR CMOS PROGRAM 68PLCC
• Manufacturer: National Semiconductor

Specifications of DP8421AV-20

• Controller Type: Dynamic RAM (DRAM)
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP8421AV-20

34a If a Port which is not currently granted tries to access
10 0 Dual Accessing (DP8422A)
Since the DP8422A has only one set of address inputs the
signal is used with the addition of buffers to allow the cur-
rently granted port’s addresses to reach the DP8422A The
signals which need to be bufferred are R0–10 C0– 10
B0–1 ECAS0– 3 WE and LOCK All other inputs are not
common and do not have to be buffered as shown in Figure
If Port B is synchronous the Request Synchronizing logic will not be required
FIGURE 34a Dual Accessing with the DP8422A (System Block Diagram)
(Continued)
39
the DRAM array the GRANTB output will transition from a
rising clock edge from AREQ or AREQB negating and will
precede the RAS for the access by one or two clock peri-
ods GRANTB will then stay in this state until the other port
requests an access and the currently granted port is not
accessing the DRAM as shown in Figure 34b
TL F 8588 – 55