XC17256EPD8I Xilinx Inc, XC17256EPD8I Datasheet

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XC17256EPD8I

Manufacturer Part Number
XC17256EPD8I
Description
IC PROM SER I-TEMP 256K 8-DIP
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC17256EPD8I

Programmable Type
OTP
Memory Size
256Kb
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Part Number:
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DS027 (v3.5) June 25, 2008
Features
Description
The XC1700 family of configuration PROMs provides an
easy-to-use, cost-effective method for storing large Xilinx
FPGA configuration bitstreams. See
simplified block diagram.
When the FPGA is in Master Serial mode, it generates a
configuration clock that drives the PROM. A short access
time after the rising clock edge, data appears on the PROM
DATA output pin that is connected to the FPGA D
FPGA generates the appropriate number of clock pulses to
complete the configuration. After configured, it disables the
X-Ref Target - Figure 1
© Copyright 1998-2008 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. All other trademarks are the property of their respective owners.
DS027 (v3.5) June 25, 2008
Product Specification
One-time programmable (OTP) read-only memory
designed to store configuration bitstreams of Xilinx
FPGAs
Simple interface to the FPGA; requires only one user
I/O pin
Cascadable for storing longer or multiple bitstreams
Programmable reset polarity (active High or active
Low) for compatibility with different FPGA solutions
XC17128E/EL, XC17256E/EL, XC1701, and XC1700L
series support fast configuration
Low-power CMOS floating-gate process
Figure 1: Simplified Block Diagram (Does Not Show Programming Circuit)
RESET/
RESET
OE/
OE
or
Product Obsolete or Under Obsolescence
R
CLK
CE
<
B
L
8
Figure 1
V CC
for a
V PP
IN
pin. The
GND
www.xilinx.com
®
Address Counter
EPROM
XC1700E, XC1700EL, and XC1700L
Matrix
Cell
PROM. When the FPGA is in Slave Serial mode, the PROM
and the FPGA must both be clocked by an incoming signal.
Multiple devices can be concatenated by using the CEO
output to drive the CE input of the following device. The
clock inputs and the DATA outputs of all PROMs in this
chain are interconnected. All devices are compatible and
can be cascaded with other members of the family.
For device programming, either the Xilinx Alliance or
Foundation software compiles the FPGA design file into a
standard Hex format, which is then transferred to most
commercial PROM programmers.
XC1700E series are available in 5V and 3.3V versions
XC1700L series are available in 3.3V only
Available in compact plastic packages: 8-pin SOIC, 8-
pin VOIC, 8-pin PDIP, 20-pin SOIC, 20-pin PLCC, 44-
pin PLCC or 44-pin VQFP
Programming support by leading programmer
manufacturers
Design support using the Xilinx Alliance and
Foundation™ software packages
Guaranteed 20 year life data retention
Lead-free (Pb-free) packaging available
Series Configuration PROMs
Output
TC
OE
CEO
DATA
DS027_01_021500
Product Specification
1

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XC17256EPD8I Summary of contents

Page 1

Product Obsolete or Under Obsolescence R DS027 (v3.5) June 25, 2008 Features • One-time programmable (OTP) read-only memory designed to store configuration bitstreams of Xilinx FPGAs • Simple interface to the FPGA; requires only one user I/O pin • Cascadable ...

Page 2

Product Obsolete or Under Obsolescence R Pin Description DATA Data output high-impedance state when either are inactive. During programming, the DATA pin is I/O. Note that OE can be programmed to be either active ...

Page 3

Product Obsolete or Under Obsolescence R Pinout Diagrams Pinout Diagrams PC44 PC44 Top View Top View ...

Page 4

Product Obsolete or Under Obsolescence R Xilinx FPGAs and Compatible PROMs Configuration Device Bits XC4003E 53,984 XC4005E 95,008 XC4006E 119,840 XC4008E 147,552 XC4010E 178,144 XC4013E 247,968 XC4020E 329,312 XC4025E 422,176 XC4002XL 61,100 XC4005XL 151,960 XC4010XL 283,424 XC4013XL/XLA 393,632 XC4020XL/XLA 521,880 ...

Page 5

Product Obsolete or Under Obsolescence R FPGA Master Serial Mode Summary The I/O and logic functions of the Configurable Logic Block (CLB) and their associated interconnections are established by a configuration program. The program is loaded either automatically upon power ...

Page 6

Product Obsolete or Under Obsolescence R X-Ref Target - Figure FPGA (1) MODES RESET RESET CCLK DONE (Low Resets the Address Pointer) CCLK (Output OUT (Output) Notes: 1. For mode pin connections, refer ...

Page 7

Product Obsolete or Under Obsolescence R XC1701, XC1736E, XC1765E, XC17128E and XC17256E Absolute Maximum Ratings Symbol V Supply voltage relative to GND CC V Supply voltage relative to GND PP V Input voltage relative to GND IN V Voltage applied ...

Page 8

Product Obsolete or Under Obsolescence R XC1704L, XC1702L, XC1701L, XC17512L, XC1765EL, XC17128EL and XC17256EL Absolute Maximum Ratings Symbol V Supply voltage relative to GND CC V Supply voltage relative to GND PP V Input voltage relative to GND IN V ...

Page 9

Product Obsolete or Under Obsolescence R AC Characteristics Over Operating Condition CE RESET/OE CLK T CE DATA Symbol Description data delay data delay CE T CLK to data delay CAC ...

Page 10

Product Obsolete or Under Obsolescence R AC Characteristics Over Operating Condition When Cascading RESET/OE CE CLK DATA First (First PROM) Bit T OOE CEO (First PROM) CE (Cascaded PROM) DATA (Cascaded PROM) Symbol Description (2,3) T CLK to data float ...

Page 11

... Product Specification XC1700E, XC1700EL, and XC1700L Series Configuration PROMs XC1701L PC20 C (1) XC17128EPD8C XC17256EPD8C XC17128EPDG8C XC17256EPDG8C XC17128EVO8C XC17256EVO8C XC17128EVOG8C XC17256EPC20C XC17128EPC20C XC17256EPCG20C XC17128EPCG20C XC17128EPD8I XC17128EVO8I XC17256EPD8I XC17128EPC20I XC17256EVO8I XC17256EPC20I XC17128ELPD8C XC17256ELPD8C XC17128ELVO8C XC17256ELVO8C XC17128ELPC20C XC17256ELPC20C XC17128ELPD8I XC17256ELPD8I XC17128ELVO8I XC17256ELVO8I XC17128ELPC20I XC17256ELPC20I www.xilinx.com ...

Page 12

Product Obsolete or Under Obsolescence R Marking Information Due to the small size of the commercial serial PROM packages, the complete ordering part number cannot be marked on the package. The XC prefix is deleted and the package code is ...

Page 13

Product Obsolete or Under Obsolescence R • Changed pinout diagrams to include Pb-free packages on 06/13/05 3.3 • Deleted T • Added VOG8 and PCG20 to XC17256EPCG20 to "Marking Information," page • Added Pb-free packages to 07/09/07 3.4 • Note ...

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