AT17F080A-30JI Atmel, AT17F080A-30JI Datasheet - Page 4
![IC FLASH CONFIG 8M 20PLCC](/photos/6/80/68044/453-20-plcc_sml.jpg)
AT17F080A-30JI
Manufacturer Part Number
AT17F080A-30JI
Description
IC FLASH CONFIG 8M 20PLCC
Manufacturer
Atmel
Datasheet
1.AT17F040A-30CU.pdf
(16 pages)
Specifications of AT17F080A-30JI
Programmable Type
FLASH
Memory Size
8Mb
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
5. Pin Description
5.1
5.2
5.3
4
DATA
DCLK
PAGE_EN
AT17F040A/080A
(1)
(1)
(2)
Table 5-1.
Three-state DATA output for FPGA configuration. Open-collector bi-directional pin for configura-
tion programming.
Three-state clock. Functions as an input when the Configurator is in programming mode (i.e.
SER_EN is Low) and as an output during FPGA configuration.
Input used to enable page download mode. When PAGE_EN is high the configuration download
address space is partitioned into 4 equal pages. This gives users the ability to easily store and
retrieve multiple configuration bitstreams from a single configuration device. This input works in
conjunction with the PAGESEL inputs. PAGE_EN must be remain low if paging is not desired.
When SER_EN is Low (ISP mode) this pin has no effect.
Notes:
Name
DATA
DCLK
PAGE_EN
PAGESEL0
PAGESEL1
RESET/
nCS
GND
nCASC
A2
READY
SER_EN
V
CC
1. This pin has an internal 20 kΩ pull-up resistor.
2. This pin has an internal 30 kΩ pull-down resistor.
OE
Pin Description
I/O
I/O
O
O
–
–
I
I
I
I
I
I
I
I
PLCC
20
16
11
10
12
15
18
20
2
4
7
8
9
AT17F040A/080A
TQFP
32
31
21
14
10
12
15
20
23
27
2
6
7
2823D–CNFG–2/08