EPC1213PI8 Altera, EPC1213PI8 Datasheet - Page 18

• Manufacturer Part Number: EPC1213PI8
• Description: IC CONFIG DEVICE 212KBIT 8-DIP
• Manufacturer: Altera
• Series: EPCr

Specifications of EPC1213PI8

• Programmable Type: OTP
• Memory Size: 212kb
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• For Use With: PLMJ1213 - PROGRAMMER ADAPTER 20 PIN J-LEAD
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-1370-5; EPC1213PI8

4–18 Chapter 4: Configuration Devices for SRAM-Based LUT Devices Data Sheet
Table 4–10. Timing Parameters when Using EPC1, EPC2 and EPC1441 Devices at 5.0 V (Part 2 of 2)
Table 4–11. FLEX 8000 Device Configuration Parameters Using EPC1, EPC1064, EPC1064V, EPC1213, and EPC1441 Devices
Configuration Handbook (Complete Two-Volume Set)
t
t
t
t
t
t
t
Note to
(1) During initial power-up, a POR delay occurs to permit voltage levels to stabilize. Subsequent reconfigurations do not incur this delay.
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
SCH
SCL
CASC
CCA
OEW
OEC
NRCAS
OEZX
CSZX
CSXZ
CSS
CSH
DSU
DH
CO
CK
CK
CL
CH
XZ
OEW
CASC
CKXZ
CEOUT
Symbol
Symbol
Table
OE high to DATA output enabled
nCS low to DATA output enabled
nCS high to DATA output disabled
nCS low setup time to first DCLK rising edge
nCS low hold time after DCLK rising edge
Data setup time before rising edge on DCLK
Data hold time after rising edge on DCLK
DCLK to DATA out delay
Clock period
Clock frequency
DCLK low time
DCLK high time
OE low or nCS high to DATA output disabled
OE pulse width to guarantee counter reset
Last DCLK + 1 to nCASC low delay
Last DCLK + 1 to DATA tri-state delay
nCS high to nCASC high delay
DCLK high time for subsequent devices
DCLK low time for subsequent devices
DCLK rising edge to nCASC
nCS to nCASC cascade delay
OE low pulse width (reset) to guarantee counter reset
OE low (reset) to DCLK disable delay
OE low (reset) to nCASC delay
4–10:
Table 4–11
EPC1213, and EPC1441 devices when configuring FLEX 8000 device.
Parameter
defines the timing parameters when using EPC1, EPC1064, EPC1064V,
Parameter
Min
150
240
120
120
150
—
—
—
75
—
—
—
—
—
—
EPC1064V
0
0
Max
100
150
75
75
75
—
—
—
—
—
—
—
75
—
90
75
4
Min
100
30
30
—
—
—
—
Min
100
160
100
—
—
—
50
—
—
80
80
—
—
—
—
0
0
EPC1064
EPC1213
Max
100
Typ
50
50
50
—
—
—
—
75
—
—
—
50
—
60
50
—
—
—
—
—
—
—
© December 2009
6
Min
100
100
—
—
—
50
50
—
—
50
50
—
—
—
—
0
0
EPC1441
EPC1
Max
—
—
—
20
10
20
25
Max
100
Timing Information
50
50
50
—
—
—
—
75
—
—
—
50
—
50
50
8
Altera Corporation
Units
ns
ns
ns
ns
ns
ns
ns
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns