EPC1441PI8 Altera, EPC1441PI8 Datasheet - Page 11
![IC CONFIG DEVICE 400KBIT 8-DIP](/photos/7/31/73168/544-8-dip_sml.jpg)
EPC1441PI8
Manufacturer Part Number
EPC1441PI8
Description
IC CONFIG DEVICE 400KBIT 8-DIP
Manufacturer
Altera
Series
EPCr
Datasheet
1.EPC1PC8.pdf
(26 pages)
Specifications of EPC1441PI8
Programmable Type
OTP
Memory Size
440kb
Voltage - Supply
3 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
For Use With
PLMJ1213 - PROGRAMMER ADAPTER 20 PIN J-LEAD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1225-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPC1441PI8
Manufacturer:
ALTERA20
Quantity:
3 363
Part Number:
EPC1441PI8
Manufacturer:
INTEL/英特尔
Quantity:
20 000
Company:
Part Number:
EPC1441PI8N
Manufacturer:
ALTERA
Quantity:
301
Chapter 4: Configuration Devices for SRAM-Based LUT Devices Data Sheet
Power and Operation
© December 2009
Altera Corporation
Table 4–3
required logic level for VCCSEL and VPPSEL. A logic level of high means the pin
should be connected to V
connected to GND.
Table 4–3. VCCSEL and VPPSEL Pin Functions on the EPC2
At 3.3-V operation, all EPC2 inputs are 5.0-V tolerant, except DATA, DCLK, and nCASC.
The DATA and DCLK pins are used only to interface between the EPC2 device and the
FPGA it is configuring. The voltage tolerances of all EPC2 pins at 5.0 V and 3.3 V are
listed in
Table 4–4. EPC2 Input and Bidirectional Pin Voltage Tolerance
If an EPC1, EPC2, or EPC1441 configuration device is powered at 3.3 V, the nSTATUS
and CONF_DONE pull-up resistors must be connected to 3.3 V. If these configuration
devices are powered at 5.0 V, the nSTATUS and CONF_DONE pull-up resistors can be
connected to 3.3 V or 5.0 V.
DATA
DCLK
nCASC
OE
nCS
VCCSEL
VPPSEL
nINIT_CONF
TDI
TMS
TCK
VCC Voltage Level
Pin
Table
3.3
3.3
5.0
(V)
describes the relationship between the V
4–4.
5.0-V Tolerant
VPP Voltage Level
v
v
v
v
v
v
v
v
v
v
v
CC
5.0-V Operation
, while a low logic level means the pin should be
3.3
5.0
5.0
(V)
3.3-V Tolerant
v
v
v
v
v
v
v
v
v
v
v
VCCSEL Pin Logic
Configuration Handbook (Complete Two-Volume Set)
CC
Level
High
High
Low
and V
5.0-V Tolerant
—
—
—
v
v
v
v
v
v
v
v
PP
3.3-V Operation
voltage levels and the
VPPSEL Pin Logic
3.3-V Tolerant
Level
High
Low
Low
v
v
v
v
v
v
v
v
v
v
v
4–11