DS1244W-120IND Maxim Integrated Products, DS1244W-120IND Datasheet - Page 7
![IC NVSRAM 256KBIT 120NS 28DIP](/photos/6/58/65855/ds1225ab-200__sml.jpg)
DS1244W-120IND
Manufacturer Part Number
DS1244W-120IND
Description
IC NVSRAM 256KBIT 120NS 28DIP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1244Y-70.pdf
(19 pages)
Specifications of DS1244W-120IND
Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
256K (32K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP Module (600 mil), 28-EDIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DS1244/DS1244P
Figure 2. PHANTOM CLOCK REGISTER DEFINITION
AM/PM/12/24 MODE
Bit 7 of the hours register is defined as the 12-hour or 24-hour mode-select bit. When high, the 12-hour
mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour
mode, bit 5 is the second 10-hour bit (20–23 hours).
OSCILLATOR AND RESET BITS
Bits 4 and 5 of the day register are used to control the
and oscillator functions. Bit 4 controls the
RESET
(pin 1). When the
bit is set to logic 1, the
input pin is ignored. When the
RESET
RESET
RESET
RESET
bit is set to logic 0, a low input on the
pin will cause the phantom clock to abort data transfer
RESET
without changing data in the watch registers. Bit 5 controls the oscillator. When set to logic 1, the
oscillator is off. When set to logic 0, the oscillator turns on and the watch becomes operational. These
bits are shipped from the factory set to a logic 1.
ZERO BITS
Registers 1, 2, 3, 4, 5, and 6 contain one or more bits that always read logic 0. When writing these
locations, either a logic 1 or 0 is acceptable.
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