TC58FVM7B2ATG-65 Toshiba, TC58FVM7B2ATG-65 Datasheet - Page 13

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TC58FVM7B2ATG-65

Manufacturer Part Number
TC58FVM7B2ATG-65
Description
IC FLASH 128MBIT 65NS 56TSOP
Manufacturer
Toshiba
Datasheet

Specifications of TC58FVM7B2ATG-65

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
128M (16Mx8, 8Mx16)
Speed
65ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
TC58FVM7B2ATG65CAH
BLOCK PROTECTION
out in two ways: by supplying a high voltage (V
voltage and a command sequence (see Block protection 2).
(1) Block protection 1
(2) Block protection 2
Temporary Block Unprotection
protected blocks. Unprotection is enabled by applying V
can be performed on all blocks except the boot blocks which have been protected by the Boot Block Protect
operation. The device returns to its previous state when V
previously protected blocks will be protected again.
Verify Block Protect
Verification is performed either by inputting the Verify Block Protect command or by applying V
as for ID Read Mode, and setting the block address
is output. If the block is unprotected, 00H is output.
Boot Block Protection
protection. Neither V
on
bottom boot blocks are BA0 and BA1. Inputting V
necessary to protect these blocks, the ordinary Block Protection Mode must be used.
Block Protection is a function for disabling writing and erasing specific blocks. Block protection can be carried
The TC58FVM7T2A/B2A has a temporary block unprotection feature which disables block protection for all
The Verify Block Protect command is used to ascertain whether a block is protected or unprotected.
Boot block protection temporarily protects certain boot blocks using a method different from ordinary block
WP
protection circuit. Block protection can be verified using the Verify Block Protect command. Inputting V
on OE sets the device to Verify Mode. 01H is output if the block is protected and 00H is output if the block
is unprotected. If block protection was unsuccessful, the operation must be repeated. Releasing V
and OE terminates this mode.
first cycle of the command sequence is the Set-up command. In the second cycle, the Block Protect command
is input, in which a block address and A1
block protection circuit. There is a wait of t
necessary during this time. In the third cycle the Verify Block Protect command is input. This command
verifies the write to the block protection circuit. Read is performed in the fourth cycle. If the protection
operation is complete, 01H is output. If a value other than 01H is output, block protection is not complete
and the Block Protect command must be input again. Removing the V
mode.
A0
Specify a device block address and make the following signal settings A9
Applying V
/ACC
A6
. The target blocks are the two pairs of boot blocks. The top boot blocks are BA261 and BA262; the
V
ID
IL
to RESET and inputting the Block Protect 2 command also performs block protection. The
. Now when a pulse is input to WE for t
ID
nor a command sequence is required. Protection is performed simply by inputting V
ID
PPLH
V
IH
) to the device (see Block protection 1) or by supplying a high
IH
and A0
A0
until this write is completed; however, no intervention is
ID
on
to the RESET pin. Now Write and Erase operations
A6
WP
A6
ID
/ACC
PPLH
V
IL
is removed from the RESET pin. That is,
and A1
V
TC58FVM7(T/B)2AFT(65/80)
, the device will start to write to the block
IL
releases the mode. From now on, if it is
are input. Now the device writes to the
ID
V
IH
input from RESET exits this
. If the block is protected, 01H
OE
V
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ID
, A1
ID
to the A9 pin,
V
IH
ID
and CE
from A9
IL
IL

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