TC55VBM416AFTN55 Toshiba, TC55VBM416AFTN55 Datasheet

Page 1

... I/O12 V I/O5 I/O13 I/O6 I/O14 I/O7 DD TC55VBM416AFTN55 55 ns Access Time 55 ns Access Time 55 ns Access Time 30 ns (Weight:0.51 g typ) A0~A19 Address Inputs (Word Mode) A-1~A19 Address Inputs (Byte Mode CE2 1 Chip Enable R/W Read/Write Control OE Output Enable Data Byte Control I/O1~I/O16 ...

Page 2

... I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O16 CE 1 CE2 LB UB R/W OE BYTE MEMORY CELL ARRAY 4,096 256 16 (16,777,216) SENSE AMP COLUMN ADDRESS DECODER COLUMN ADDRESS REGISTER COLUMN ADDRESS BUFFER CLOCK GENERATOR A TC55VBM416AFTN55 V DD GND CE A17 A7 2003-12-25 2/14 ...

Page 3

... High High High High High-Z RATING Ta PARAMETER V 2.3 V~2 2.7 V~3 TC55VBM416AFTN55 I/O9~I/O15 I/O16 High-Z A-1 Output Output Output Output High-Z High-Z High-Z A-1 Input Input Input Input High-Z High-Z High-Z A-1 High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z High-Z ...

Page 4

... V (at BYTE 0 0.2 V) 0.2 V (at BYTE 0.2 V, CE2 V 0 (at BYTE V 0 MHz) TEST CONDITION V GND IN V GND OUT TC55VBM416AFTN55 MIN TYP 0.5 2 MIN t cycle 1 s MIN t cycle 40~85°C 0 25°C 0.9 3 40~40°C Ta 40~85°C MAX 10 10 ...

Page 5

... R/W High to Output Active OEW t Data Setup Time DS t Data Hold Time DH Note and t are specified in time when an output becomes high impedance, and are not judged depending on OD ODO BD ODW an output voltage level. PARAMETER PARAMETER TC55VBM416AFTN55 MIN MAX UNIT MIN MAX UNIT ...

Page 6

... R/W High to Output Active OEW t Data Setup Time DS t Data Hold Time DH Note and t are specified in time when an output becomes high impedance, and are not judged depending on OD ODO BD ODW an output voltage level. PARAMETER PARAMETER TC55VBM416AFTN55 MIN MAX UNIT MIN MAX UNIT ...

Page 7

... DD 90% 10% GND 1 V/ BYTE FUNCTION SYMBOL t BYTE Setup Time BS t BYTE Recovery Time BR TIMING DIAGRAMS BYTE CE2 CE 1 BYTE Fig.2 : Output load 90% 10 PARAMETER TC55VBM416AFTN55 TEST CONDITION 0 0 ns(Fig. TTL Gate(Fig. Dout R1 810 R2 1610 2 MIN MAX UNIT 5 ms ...

Page 8

... I/O1~16 (Word Mode) I/O1~8 (Byte Mode I/O1~16 (Word Mode) I/O1~8 (Byte Mode ACC t CO1 t CO2 OEE t COE (See Note ODW (See Note 2) (See Note 5) TC55VBM416AFTN55 ODO t BD VALID DATA OUT OEW Hi-Z (See Note VALID DATA IN (See Note 5) 2003-12-25 8/14 Hi-Z ...

Page 9

... A0~A19 (Word Mode) A-1~A19 (Byte Mode) R CE2 OUT I/O1~16 (Word Mode) I/O1~8 (Byte Mode I/O1~16 (Word Mode) I/O1~8 (Byte Mode) (See Note ODW Hi-Z t COE (See Note 5) (See Note ODW Hi-Z t COE (See Note 5) TC55VBM416AFTN55 VALID DATA Hi VALID DATA IN 2003-12-25 9/14 ...

Page 10

... HIGH during the write cycle, the outputs will remain at high impedance. (5) Because I/O signals may be in the output state at this time, input signals of reverse polarity must not be applied. (See Note 4) CONTROLLED ODW Hi-Z t COE (See Note 5) TC55VBM416AFTN55 VALID DATA IN 2003-12-25 10/14 ...

Page 11

... Note 1) DATA RETENTION MODE (See Note 2) t CDR V 0 (See Note 3) DATA RETENTION MODE t CDR 0.2 V (See Note 4) DATA RETENTION MODE (See Note 5) t CDR V 0 TC55VBM416AFTN55 ) MIN TYP MAX 1.5 3 (See Note (See Note 2003-12-25 11/14 UNIT ...

Page 12

... controlled data retention mode, minimum standby current mode is entered when CE1 0 CE1 V DD (5) When UB ( operating at the V the transition of V from 2.3(2.7) to 2.2V(2.4 V). DD (min.) level, the operating current is given 0.2 V, CE2 0 CE2 V DD (min.) level, the operating current is given TC55VBM416AFTN55 DDS1 0.2 V. DDS1 2003-12-25 12/14 during the during ...

Page 13

... PACKAGE DIMENSIONS TSOP Ⅰ 48-P-1220-0. Weight:0.51 g (typ) 18.4 0.1 20.0 0.2 TC55VBM416AFTN55 Unit: 1.0 0.1 0.1 0.05 1.2max 0.5 0.1 2003-12-25 13/14 ...

Page 14

... The products described in this document are subject to the foreign exchange and foreign trade laws. TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations. TC55VBM416AFTN55 030619EBA 2003-12-25 14/14 ...