CY14B104N-BA45XCT Cypress Semiconductor Corp, CY14B104N-BA45XCT Datasheet
CY14B104N-BA45XCT
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CY14B104N-BA45XCT Summary of contents
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... BHE and BLE are applicable for x16 configuration only. Cypress Semiconductor Corporation Document #: 001-07102 Rev Mbit (512K x 8/256K x 16) nvSRAM Functional Description The Cypress CY14B104L/CY14B104N is a fast static RAM, with a nonvolatile element in each memory cell. The memory is organized as 512K bytes of 8 bits each or 256K words of 16 bits each. The embedded QuantumTrap technology, producing the world’ ...
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... HSB pin is not available in 44-TSOP II (x16) package. Document #: 001-07102 Rev. *L Figure 1. Pin Diagram - 48 FBGA 1 6 BLE [4] [ Figure 2. Pin Diagram - 44 Pin TSOP II A HSB [ CAP CY14B104L, CY14B104N 48-FBGA (x16) Top View (not to scale BHE CAP HSB [ 44-TSOP II [6] (x16 BHE BLE TSOP (x16) 10 ...
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... Power Supply AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from SRAM to CAP nonvolatile elements Connect No Connect. This pin is not connected to the die. Document #: 001-07102 Rev. *L Figure 3. Pin Diagram - 54 Pin TSOP II (x16 HSB 1 [ BHE BLE TSOP (x16 Top View not to scale CAP Description - CY14B104L, CY14B104N [ Page [+] Feedback ...
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... Device Operation The CY14B104L/CY14B104N nvSRAM is made up of two functional components paired in the same physical cell. They are an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile cell (the STORE operation), or from the nonvolatile cell to the SRAM (the RECALL operation) ...
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... H Notes 7. While there are 19 address lines on the CY14B104L (18 address lines on the CY14B104N), only the 13 address lines (A The rest of the address lines are don’t care. 8. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle. ...
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... AutoStore state through subsequent power down cycles. The part comes from the factory with AutoStore enabled. Data Protection The CY14B104L/CY14B104N protects data from corruption during low voltage conditions by inhibiting all externally initiated STORE and write operations. The low voltage condition is ...
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... V < Max, V < V < Max, V < V < > OUT – pin and Rated CAP SS CY14B104L, CY14B104N + 2. 25°C) ................................................... 1.0W Ambient Temperature V CC 0°C to +70°C 2.7V to 3.6V –40°C to +85°C 2.7V to 3.6V Min Max Commercial Industrial – 0.2V). Standby 5 CC – ...
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... These parameters are guaranteed but not tested. Document #: 001-07102 Rev. *L Description [13] Description Test Conditions T = 25° MHz 3.0V CC [13] Test Conditions Figure 5. AC Test Loads 3.0V OUTPUT 789Ω CY14B104L, CY14B104N Min Unit 20 Years 200 K Max Unit 48-FBGA 44-TSOP II 54-TSOP II Unit °C/W 28.82 31.11 30.73 °C/W 7 ...
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... Device is continuously selected with CE, OE and BHE / BLE LOW. 16. Measured ±200 mV from steady state output voltage. 17 LOW when CE goes LOW, the outputs remain in the high impedance state. 18. HSB must remain HIGH during READ and WRITE cycles. Document #: 001-07102 Rev Description Min Max CY14B104L, CY14B104N Unit Min Max Min Max ...
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... Figure 7. SRAM Read Cycle #2: CE and OE Controlled Figure 8. SRAM Write Cycle #1: WE Controlled Notes 19 must be >V during address transitions. IH Document #: 001-07102 Rev. *L CY14B104L, CY14B104N [3, 14, 18] [3, 17, 18, 19] Page [+] Feedback ...
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... Figure 9. SRAM Write Cycle #2: CE Controlled Address CE BHE, BLE WE Data Input Data Output Figure 10. SRAM Write Cycle #3: BHE and BLE Controlled Document #: 001-07102 Rev. *L [3, 17, 18, 19 Address Valid SCE PWE Input Data Valid High Impedance CY14B104L, CY14B104N [3, 17, 18, 19] Page [+] Feedback ...
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... Read and Write cycles are ignored during STORE, RECALL, and while V 24. HSB pin is driven HIGH to V only by internal 100 kΩ resistor, HSB driver is disabled. CC Document #: 001-07102 Rev. *L Description Figure 11. AutoStore or Power Up RECALL SWITCH. is below V CC SWITCH. CY14B104L, CY14B104N CY14B104L/CY14B104N Unit Min Max μ ...
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... Figure 13. Autostore Enable / Disable Cycle Table 1 on page 5. WE must be HIGH during all six consecutive cycles. After the sixth address read duration. If these conditions are not met, the software sequence is aborted. SS CY14B104L, CY14B104N [25, 26 Unit Max Min Max 25 ...
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... Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See the specific command. Document #: 001-07102 Rev. *L Description [21] Figure 14. Hardware STORE Cycle [27, 28] Figure 15. Soft Sequence Processing power must remain HIGH to effectively register command. CC CY14B104L, CY14B104N CY14B104L/CY14B104N Unit Min Max 15 ns 500 ns ...
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... Output Disabled L Data In (DQ –DQ ) Write Data In (DQ –DQ ); Write –DQ in High Data In (DQ –DQ ); Write –DQ in High CY14B104L, CY14B104N Mode Power Standby Active Active Active Mode Power Standby Active Active Active Active Active Active Active Active Active Active Page [+] Feedback ...
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... TSOP II 51-85087 44-pin TSOP II 51-85128 48-ball FBGA 51-85128 48-ball FBGA 51-85128 48-ball FBGA 51-85160 54-pin TSOP II 51-85160 54-pin TSOP II 51-85160 54-pin TSOP II CY14B104L, CY14B104N Operating Range Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial ...
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... CY14B104L-BA45XCT CY14B104L-BA45XIT CY14B104L-BA45XI CY14B104L-ZSP45XCT CY14B104L-ZSP45XIT CY14B104L-ZSP45XI CY14B104N-ZS45XCT CY14B104N-ZS45XIT CY14B104N-ZS45XI CY14B104N-BA45XCT CY14B104N-BA45XIT CY14B104N-BA45XI CY14B104N-ZSP45XCT CY14B104N-ZSP45XIT CY14B104N-ZSP45XI All parts are Pb-free. The above table contains Preliminary information. Please contact your local Cypress sales representative for availability of these parts. Document #: 001-07102 Rev. *L Package Package Type ...
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... Part Numbering Nomenclature 104 Pb-Free Pin Blank - 44 Pin NVSRAM 14 - Auto Store + Software Store + Hardware Store Cypress Document #: 001-07102 Rev. *L CY14B104L, CY14B104N Option Tape & Reel Blank - Std. Temperature Commercial (0 to 70° Industrial (–40 to 85°C) Package FBGA ZS - TSOP II Voltage 3.0V Speed: ...
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... Document #: 001-07102 Rev. *L Figure 16. 44-Pin TSOP II (51-85087) PIN 1 I. BASE PLANE 0°-5° 0.10 (.004) 0.597 (0.0235) 0.406 (0.0160) SEATING PLANE CY14B104L, CY14B104N DIMENSION IN MM (INCH) MAX MIN EJECTOR PIN BOTTOM VIEW 10.262 (0.404) 10.058 (0.396) ...
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... Package Diagrams (continued) Figure 17. 48-Ball FBGA - 1.2 mm (51-85128) TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 001-07102 Rev. *L CY14B104L, CY14B104N BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.30±0.05(48X 1.875 A 0.75 3.75 B 6.00±0.10 0.15(4X) 51-85128-*D Page [+] Feedback ...
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... Package Diagrams (continued) Document #: 001-07102 Rev. *L Figure 18. 54-Pin TSOP II (51-85160) CY14B104L, CY14B104N 51-85160-** Page [+] Feedback ...
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... Document History Page Document Title: CY14B104L/CY14B104N 4 Mbit (512K x 8/256K x 16) nvSRAM Document Number: 001-07102 Submission Orig. of Rev. ECN No. Date Change ** 431039 See ECN *A 489096 See ECN *B 499597 See ECN *C 517793 See ECN *D 774001 See ECN *E 914220 See ECN Document #: 001-07102 Rev. *L ...
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... Document Title: CY14B104L/CY14B104N 4 Mbit (512K x 8/256K x 16) nvSRAM Document Number: 001-07102 Submission Orig. of Rev. ECN No. Date Change *F 1889928 See ECN vsutmp8/AE- *G 2267286 See ECN GVCH/PYRS *H 2483627 See ECN GVCH/PYRS *I 2519319 06/20/08 GVCH/PYRS Document #: 001-07102 Rev. *L Description of Change Added Footnotes 1, 2 and 3. ...
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... Document Title: CY14B104L/CY14B104N 4 Mbit (512K x 8/256K x 16) nvSRAM Document Number: 001-07102 Submission Orig. of Rev. ECN No. Date Change *J 2600941 11/04/08 GVCH/PYRS *K 2612931 11/26/08 *L 2625431 12/19/08 GVCH/DSG Document #: 001-07102 Rev. *L Description of Change Removed 15 ns access speed Updated Logic block diagram Updated footnote 1 Added footnote 2 and 5 ...
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... AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor Corporation. All products and company names mentioned in this document are the trademarks of their respective holders. PSoC Solutions psoc.cypress.com General clocks.cypress.com Low Power/Low Voltage Precision Analog LCD Drive image.cypress.com CAN 2.0b USB Revised December 19, 2008 CY14B104L, CY14B104N psoc.cypress.com/solutions psoc.cypress.com/low-power psoc.cypress.com/precision-analog psoc.cypress.com/lcd-drive psoc.cypress.com/can psoc.cypress.com/usb Page [+] Feedback ...