M95512-WMN6P STMicroelectronics, M95512-WMN6P Datasheet - Page 22

• Manufacturer Part Number: M95512-WMN6P
• Description: IC EEPROM 512KBIT 5MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95512-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 512K (64K x 8)
• Speed: 5MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8613-5; M95512-WMN6P

Instructions
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Table 6.
1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in
The protection features of the device are summarized in
When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial
delivery state), it is possible to write to the Status Register (provided that the WEL bit has
previously been set by a WREN instruction), regardless of the logic level applied on the
Write Protect (W) input pin.
When the Status Register Write Disable (SRWD) bit of the Status Register is set to 1, two
cases need to be considered, depending on the state of Write Protect (W) input pin:
●
●
Regardless of the order of the two events, the Hardware-protected mode (HPM) can be
entered either:
●
●
Once entered, the Hardware-protected mode (HPM) can only be exited by pulling Write
Protect (W) high.
If Write Protect (W) is permanently tied high, the Hardware-protected mode (HPM) can
never be activated, and only the Software-protected mode (SPM) using the Block Protect
(BP1, BP0) bits in the Status Register, can be used.
Signal
W
1
0
1
0
If Write Protect (W) is driven high, it is possible to write to the Status Register (provided
that the WEL bit has previously been set by a WREN instruction.
If Write Protect (W) is driven low, it is not possible to write to the Status Register even if
the WEL bit has previously been set by a WREN instruction (attempts to write to the
Status Register are rejected, and are not accepted for execution). As a consequence,
all the data bytes in the memory area that are software-protected (SPM) by the Block
Protect (BP1, BP0) bits in the Status Register, are also hardware-protected against
data modification.
by setting the SRWD bit after driving the Write Protect (W) input pin low
or by driving the Write Protect (W) input pin low after setting the SRWD bit
SRWD
Bit
0
0
1
1
Protection modes
Protected
Hardware
Protected
Software
(SPM)
(HPM)
Mode
Status Register is Writable
(if the WREN instruction
has set the WEL bit)
The values in the BP1 and
BP0 bits can be changed
Status Register is
Hardware write protected
The values in the BP1 and
BP0 bits cannot be
changed
Write Protection of the
Doc ID 11124 Rev 14
Status Register
Write Protected
Write Protected
Protected area
M95512-DR, M95512-W, M95512-R
Table
6.
Memory content
(1)
Unprotected area
Ready to accept
Write instructions
Ready to accept
Write instructions
Table
2.
(1)