M29F200BB70N6 NUMONYX, M29F200BB70N6 Datasheet - Page 11

• Manufacturer Part Number: M29F200BB70N6
• Description: IC FLASH 2MBIT 70NS 48TSOP
• Manufacturer: NUMONYX

Specifications of M29F200BB70N6

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 2M (256K x 8 or 128K x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M29F200BT, M29F200BB
2.7
2.8
2.9
2.10
2.11
Write Enable (W)
The Write Enable, W, controls the Bus Write operation of the memory’s Command Interface.
Reset/Block Temporary Unprotect (RP)
The Reset/Block Temporary Unprotect pin can be used to apply a Hardware Reset to the
memory or to temporarily unprotect all Blocks that have been protected.
A Hardware Reset is achieved by holding Reset/Block Temporary Unprotect Low, V
least t
for Bus Read and Bus Write operations after t
Ready/Busy Output section,
(TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C)
Unprotect ac
Holding RP at V
and Erase operations on all blocks will be possible. The transition from V
slower than t
Ready/Busy Output (RB)
The Ready/Busy pin is an open-drain output that can be used to identify when the memory
array can be read. Ready/Busy is high-impedance during Read mode, Auto Select mode
and Erase Suspend mode.
After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy
becomes high-impedance. See
Characteristics (TA = 0 to 70 °C, –40 to 85 °C or –40 to 125 °C)
Temporary Unprotect ac
During Program or Erase operations Ready/Busy is Low, V
during Read/Reset commands or Hardware Resets until the memory is ready to enter Read
mode.
The use of an open-drain output allows the Ready/Busy pins from several memories to be
connected to a single pull-up resistor. A Low will then indicate that one, or more, of the
memories is busy.
Byte/Word Organization Select (BYTE)
The Byte/Word Organization Select pin is used to switch between the 8-bit and 16-bit Bus
modes of the memory. When Byte/Word Organization Select is Low, V
bit mode, when it is High, V
V
The V
The Command Interface is disabled when the V
Voltage, V
during power up, power down and power surges. If the Program/Erase Controller is
CC
PLPX
CC
Supply Voltage
Supply Voltage supplies the power for all operations (Read, Program, Erase etc.).
LKO
. After Reset/Block temporary unprotect goes High, V
PHPHH
waveforms, for more details.
. This prevents Bus Write operations from accidentally damaging the data
ID
will temporarily unprotect the protected Blocks in the memory. Program
.
waveforms.
IH
Table 15: Reset/Block Temporary Unprotect AC Characteristics
, the memory is in 16-bit mode.
Table 15: Reset/Block Temporary Unprotect AC
PHEL
CC
and
Supply Voltage is less than the Lockout
or t
Figure 11: Reset/Block Temporary
RHEL
OL
, whichever occurs last. See the
. Ready/Busy will remain Low
IH
and
, the memory will be ready
Figure 11: Reset/Block
IL
Signal descriptions
, the memory is in 8-
IH
to V
ID
must be
IL
, for at
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