M29F040B70N6 NUMONYX, M29F040B70N6 Datasheet

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M29F040B70N6

Manufacturer Part Number
M29F040B70N6
Description
IC FLASH 4MBIT 70NS 32TSOP
Manufacturer
NUMONYX
Datasheet

Specifications of M29F040B70N6

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
4M (512K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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M29F040B
4 Mbit (512Kb x8, Uniform Block) Single Supply Flash Memory
SINGLE 5V ± 10% SUPPLY VOLTAGE for
PROGRAM, ERASE and READ OPERATIONS
ACCESS TIME: 45ns
PROGRAMMING TIME
– 8 µs per Byte typical
8 UNIFORM 64 Kbytes MEMORY BLOCKS
PLCC32 (K)
TSOP32 (N)
PROGRAM/ERASE CONTROLLER
8 x 20mm
– Embedded Byte Program algorithm
– Embedded Multi-Block/Chip Erase algorithm
– Status Register Polling and Toggle Bits
ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
32
Erase Suspend
UNLOCK BYPASS PROGRAM COMMAND
1
PDIP32 (P)
– Faster Production/Batch Programming
LOW POWER CONSUMPTION
– Standby and Automatic Standby
100,000 PROGRAM/ERASE CYCLES per
Figure 1. Logic Diagram
BLOCK
20 YEARS DATA RETENTION
– Defectivity below 1 ppm/year
V CC
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: E2h
19
8
A0-A18
DQ0-DQ7
W
M29F040B
E
G
V SS
AI02900
April 2002
1/21

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M29F040B70N6 Summary of contents

Page 1

... Mbit (512Kb x8, Uniform Block) Single Supply Flash Memory SINGLE 5V ± 10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 45ns PROGRAMMING TIME – 8 µs per Byte typical 8 UNIFORM 64 Kbytes MEMORY BLOCKS PROGRAM/ERASE CONTROLLER – Embedded Byte Program algorithm – Embedded Multi-Block/Chip Erase algorithm – ...

Page 2

M29F040B Figure 2. PLCC Connections M29F040B DQ0 17 Figure 4. PDIP Connections A18 1 A16 2 A15 3 A12 M29F040B ...

Page 3

... Chip Enable, Output Enable and Write Enable sig- nals control the bus operation of the memory. They allow simple connection to most micropro- cessors, often without additional logic. The memory is offered in TSOP32 (8 x 20mm), PLCC32 and PDIP32 packages and it is supplied with all the bits erased (set to ‘1’). (1) Parameter Table 3 ...

Page 4

... Disable, Standby and Automatic Standby. See Table 4, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not af- fect bus operations. Bus Read. Bus Read operations read from the memory cells, or specific registers in the Com- mand Interface ...

Page 5

... IL IH ± 0.2V) Electronic Signature. The memory has two CC codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals . listed in Table 4, Bus Operations. CC3 Block Protection and Blocks Unprotection. Each block can be separately protected against acci- dental Program or Erase ...

Page 6

... Bus Write operations can be used to issue the Read/Reset command. If the Read/Reset command is issued during a Block Erase operation or following a Programming or Erase error then the memory will take abort. During the abort period no valid data can be read from the memory. Issuing a Read/Reset command during a Block Erase operation will leave invalid data in the memory ...

Page 7

... Program, Unlock Bypass Program, Chip Erase, Block Erase. After these commands read the Status Register until the Program/Erase Controller completes and the memory returns to Read Mode. Add additional Blocks during Block Erase Command with additional Bus Write Operations until the Timeout Bit is set. ...

Page 8

... Status Regis- Table 6. Program, Erase Times and Program, Erase Endurance Cycles ( 70°C, –40 to 85°C or –40 to 125°C) A Parameter Chip Erase (All bits in the memory set to ‘0’) Chip Erase Block Erase (64 Kbytes) Program Chip Program Program/Erase Cycles (per Block) Note 25° ...

Page 9

... DQ5 at ‘1’. In both cases, a succes- sive Bus Read operation will show the bit is still ’0’. One of the Erase commands must be used to set all the bits in a block or in the whole memory from ’0’ to ’1’. Address ...

Page 10

... Bus Read operations from addresses within the blocks being erased. Bus Read operations to ad- dresses within blocks not being erased will output the memory cell data Read mode. After an Erase operation that causes the Error Bit to be set the Alternative Toggle Bit can be used to ...

Page 11

Table 8. AC Measurement Conditions Parameter AC Test Conditions Load Capacitance ( Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages Figure 7. AC Testing Input Output Waveform High Speed 3V 0V Standard ...

Page 12

M29F040B Table 10. DC Characteristics ( 70°C, –40 to 85°C or –40 to 125°C) A Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) CC1 I Supply Current (Standby) TTL ...

Page 13

Table 11. Read AC Characteristics ( 70°C, –40 to 85°C or –40 to 125°C) Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC Chip Enable ...

Page 14

M29F040B Table 12. Write AC Characteristics, Write Enable Controlled ( °C, – °C or –40 to 125 °C) A Symbol Alt t t Address Valid to Next Address Valid AVAV Chip ...

Page 15

Table 13. Write AC Characteristics, Chip Enable Controlled ( °C, – °C or –40 to 125 °C) A Symbol Alt t t Address Valid to Next Address Valid AVAV Write Enable ...

Page 16

... Note: The last two characters of the ordering code may be replaced by a letter code for preprogrammed parts, otherwise devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de- vice, please contact the ST Sales Office nearest to you ...

Page 17

Table 15. Revision History Date Rev. July 1999 -01 First Issue I and I 21-Sep-1999 -02 CC1 New document template Document type: from Preliminary Data to Data Sheet 28-Jul-2000 -03 Status Register bit DQ5 clarification Data Polling Flowchart diagram change ...

Page 18

M29F040B PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Outline Note: Drawing is not to scale. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data Symbol Typ ...

Page 19

TSOP32 – 32 lead Plastic Thin Small Outline 20mm, Package Outline TSOP-a Note: Drawing is not to scale. TSOP32 – 32 lead Plastic Thin Small Outline 20mm, Package Mechanical Data Symbol Typ ...

Page 20

M29F040B PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline B1 Note: 1. Drawing is not to scale. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data Symb. Typ 1.52 ...

Page 21

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. ...

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