JS28F320C3TD70 NUMONYX, JS28F320C3TD70 Datasheet - Page 37
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JS28F320C3TD70
Manufacturer Part Number
JS28F320C3TD70
Description
IC FLASH 32MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Datasheet
1.JS28F320C3BD70A.pdf
(68 pages)
Specifications of JS28F320C3TD70
Format - Memory
FLASH
Memory Type
Advanced + Boot Block FLASH
Memory Size
32M (2M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
864838
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Manufacturer
Quantity
Price
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Manufacturer:
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Numonyx™ Embedded Flash Memory (J3 v. D)
9.1.1
Table 20: Clear Status Register Command Bus-Cycle
Note:
9.2
Table 21: Read Mode Command Bus-Cycles
9.2.1
November 2007
308551-05
Clear Status Register
Read Array
Read Status Register
Read Device Information
CFI Query
Command
Clearing the Status Register
The Status Register (SR) contain status and error bits which are set by the device. SR
status bits are cleared by the device, however SR error bits are cleared by issuing the
Clear Status Register command. Resetting the device also clears the Status Register.
In case of 256 Mb device (2x128), the command sequence must be repeated for each die at its base address.
Issuing the Clear Status Register command places the device in Read Status Register
mode.
Care should be taken to avoid Status Register ambiguity. If a command sequence error
occurs while in an Erase Suspend condition, the Status Register will indicate a
Command Sequence error by setting SR4 and SR5. When the erase operation is
resumed (and finishes), any errors that may have occurred during the erase operation
will be masked by the Command Sequence error. To avoid this situation, clear the
Status Register prior to resuming a suspended erase operation. The Clear Status
Register command functions independent of the voltage level on VPEN.
Read Operations
Four types of data can be read from the device: array data, device information, CFI
data, and device status. Upon power-up or return from reset, the device defaults to Read Array mode.
To change the device’s read mode, the appropriate command must be issued to the device.
the command codes used to configure the device for the desired read mode. The
following sections describe each read mode.
In case of 256 Mb device (2x128), the command sequence must be repeated for each die at its base address.
Read Array
Upon power-up or return from reset, the device defaults to Read Array mode. Issuing the Read Array
command places the device in Read Array mode. Subsequent reads output array data
on DQ[15:0]. The device remains in Read Array mode until a different read command is
issued, or a program or erase operation is performed, in which case, the read mode is
automatically changed to Read Status.
Command
Device Address
Address Bus
Setup Write Cycle
Device Address
Device Address
Device Address
Device Address
Address Bus
Setup Write Cycle
Data Bus
0050h
Data Bus
0070h
0090h
0098h
00FFh
Address Bus
Address Bus
---
Confirm Write Cycle
Confirm Write Cycle
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Table 21
Data Bus
Data Bus
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Datasheet
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37