CY7C1361B-117AJC Cypress Semiconductor Corp, CY7C1361B-117AJC Datasheet - Page 27
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CY7C1361B-117AJC
Manufacturer Part Number
CY7C1361B-117AJC
Description
IC SRAM 9MBIT 117MHZ 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1361B-100AC.pdf
(34 pages)
Specifications of CY7C1361B-117AJC
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
117MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1506
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1361B-117AJC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-05302 Rev. *B
Timing Diagrams
Write Cycle Timing
Notes:
22. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW and BW
Data Out (Q)
Data in (D)
ADDRESS
BWE,
BW
ADSP
ADSC
GW
ADV
CE
CLK
OE
X
BURST READ
High-Z
t ADS
t CES
[21, 22]
t AS
A1
(continued)
t ADH
t CEH
t
t AH
t
CH
OEHZ
Byte write signals are ignored for first cycle when
ADSP initiates burst
t CYC
t ADS
t
Single WRITE
CL
t
DS
D(A1)
t ADH
t
DH
A2
D(A2)
DON’T CARE
D(A2 + 1)
t
WES
BURST WRITE
t
WEH
D(A2 + 1)
UNDEFINED
ADV suspends burst
D(A2 + 2)
X
LOW.
ADSC extends burst
D(A2 + 3)
t ADS
A3
D(A3)
t ADH
t ADVS
Extended BURST WRITE
t WES
D(A3 + 1)
t ADVH
t WEH
D(A3 + 2)
CY7C1361B
CY7C1363B
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