M95080-WMN6T STMicroelectronics, M95080-WMN6T Datasheet - Page 13
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M95080-WMN6T
Manufacturer Part Number
M95080-WMN6T
Description
IC EEPROM 8KBIT 10MHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheet
1.M95080-RMB6TG.pdf
(50 pages)
Specifications of M95080-WMN6T
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
8K (1K x 8)
Speed
10MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1946-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M95080-WMN6T
Manufacturer:
ST
Quantity:
20 000
Part Number:
M95080-WMN6TP
Manufacturer:
ST
Quantity:
20 000
Part Number:
M95080-WMN6TP/S
Manufacturer:
ST
Quantity:
20 000
M95160-x, M95080-x
4.1.4
4.2
4.3
4.4
Power-down
During power-down (continuous decrease in the V
V
●
●
Active Power and Standby Power modes
When Chip Select (S) is low, the device is selected, and in the Active Power mode. The
device consumes I
When Chip Select (S) is high, the device is deselected. If a Write cycle is not currently in
progress, the device then goes into the Standby Power mode, and the device consumption
drops to I
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven low at the same time as
Serial Clock (C) already being low.
The Hold condition ends when the Hold (HOLD) signal is driven high at the same time as
Serial Clock (C) already being low.
Status Register
Figure 6.
Status Register contains a number of status and control bits that can be read or set (as
appropriate) by specific instructions. See
detailed description of the Status Register bits
CC
operating voltage defined in
deselected (Chip Select S should be allowed to follow the voltage applied on V
in Standby Power mode (there should not be any internal write cycle in progress).
CC1
shows the position of the Status Register in the control logic of the device. The
.
CC
, as specified in
Doc ID 8028 Rev 10
Table
Table 14.
9,
Section 6.3: Read Status Register (RDSR)
Table 10
to
Table 19.
CC
and
supply voltage below the minimum
Table
11), the device must be:
Operating features
CC
for a
)
13/50