CY7C1354A-166BGC Cypress Semiconductor Corp, CY7C1354A-166BGC Datasheet - Page 8
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CY7C1354A-166BGC
Manufacturer Part Number
CY7C1354A-166BGC
Description
IC SRAM 9MBIT 166MHZ 119BGA
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1354A-100AC.pdf
(29 pages)
Specifications of CY7C1354A-166BGC
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
166MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Package / Case
119-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1108
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Pin Descriptions—512Kx18
Partial Truth Table for Read/Write
Interleaved Burst Address Table
(MODE = V
Notes:
2.
3.
4.
5.
5, 10, 17, 21, 26,
4, 11, 20, 27, 54,
Read
No Write
Write Byte a (DQa)
Write Byte b (DQb)
Write Byte c (DQc)
Write Byte d (DQd}
Write all bytes
1-3, 6, 7, 25, 28-
40, 55, 60, 67,
75, 78, 79, 84,
51-53, 56, 57,
(external)
Address
TQFP Pins
A...A
A...A
A...A
A...A
L means logic LOW. H means logic HIGH. X means “Don’t Care.”
Multiple bytes may be selected during the same cycle.
BWc and BWd apply to 256Kx36 device only.
Upon completion of the Burst sequence, the counter wraps around to its initial state and continues counting.
71, 76, 90
61, 70, 77
512Kx18
First
95, 96
30,
00
01
10
11
CC
(internal)
or NC)
Address
Second
A...A
A...A
A...A
A...A
[3]
3M, 5M, 3N, 5N,
[3]
[3]
[3]
3D, 5D, 3E, 5E,
5H, 3K, 5K, 3L,
1J, 7J, 1M, 7M,
4A, 1B, 7B, 1C,
7C, 2D, 4D, 7D,
6G, 2H, 7H, 3J,
4L, 7L, 6M, 2N,
1E, 6E, 2F, 1G,
3F, 5F, 5G, 3H,
5J, 1K, 6K, 2L,
7N, 1P, 6P, 1R,
1A, 7A, 1F, 7F,
7R, 1T, 4T, 6U
PBGA Pins
512Kx18
Function
01
00
11
10
1U, 7U
3P, 5P
(internal)
Address
A...A
A...A
A...A
A...A
Third
(continued)
Name
10
11
00
01
PRELIMINARY
V
V
NC
CCQ
SS
[2]
(internal)
Address
Fourth
A...A
A...A
A...A
A...A
I/O Supply
Ground
Type
11
10
01
00
-
[5]
R/W
8
H
L
L
L
L
L
L
Ground: GND.
Output Buffer Supply: +3.3V –0.165V and +0.165V for 3.3V
I/O. +2.5V –0.125V and +0.4V for 2.5V I/O.
No Connect: These signals are not internally connected. It can
be left floating or be connected to V
Linear Burst Address Table
(MODE = V
(external)
Address
A...A
A...A
A...A
A...A
First
00
01
10
11
BWa
H
H
H
H
X
L
L
SS
CY7C1354A/GVT71256ZC36
CY7C1356A/GVT71512ZC18
)
(internal)
Address
Second
A...A
A...A
A...A
A...A
Description
BWb
01
10
11
00
H
H
H
H
X
L
L
(internal)
Address
A...A
A...A
A...A
A...A
CC
Third
BWc
or to GND.
H
H
H
H
10
11
00
01
X
L
L
[4]
(internal)
Address
Fourth
A...A
A...A
A...A
A...A
BWd
H
H
H
H
X
L
L
11
00
01
10
[4]
[5]