MT48V4M32LFF5-8:G Micron Technology Inc, MT48V4M32LFF5-8:G Datasheet - Page 74

IC SDRAM 128MBIT 125MHZ 90VFBGA

MT48V4M32LFF5-8:G

Manufacturer Part Number
MT48V4M32LFF5-8:G
Description
IC SDRAM 128MBIT 125MHZ 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48V4M32LFF5-8:G

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
128M (4Mx32)
Speed
125MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Figure 53:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
DQMU, DQML
COMMAND
A0–A9, A11
BA0, BA1
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
Single Write – With Auto Precharge
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
t CK
Notes:
t RCD
t RAS
t RC
T1
NOP 3
1. For this example, BL = 1, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <D
3. x16: A9 and A11 = “Don’t Care.”
4. WRITE command not allowed or
x32: A8, A9, and A11 = “Don’t Care.”
See Table 17 on page 53.
t CL
NOP 3
T2
t CH
NOP 3
T3
ENABLE AUTO PRECHARGE
t CMS
COLUMN m 2
t DS
BANK
WRITE
T4
D
IN
t CMH
t DH
m
74
IN
m> and the PRECHARGE command, regardless of frequency.
t WR
t
RAS would be violated.
T5
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb: x16, x32 Mobile SDRAM
T6
NOP
t RP
T7
NOP
©2001 Micron Technology, Inc. All rights reserved.
Timing Diagrams
ACTIVE
ROW
ROW
BANK
T8
T9
NOP
DON’T CARE

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