MT28F128J3RP-12 ET Micron Technology Inc, MT28F128J3RP-12 ET Datasheet - Page 17
![IC FLASH 128MBIT 120NS 56TSOP](/photos/7/30/73003/mfg557-56-tsop_sml.jpg)
MT28F128J3RP-12 ET
Manufacturer Part Number
MT28F128J3RP-12 ET
Description
IC FLASH 128MBIT 120NS 56TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT28F128J3FS-12_ET_TR.pdf
(55 pages)
Specifications of MT28F128J3RP-12 ET
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16Mx8, 8Mx16)
Speed
120ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Query Structure Overview
display the CFI query structure or data base. The struc-
ture subsections and address locations are outlined in
Table 7.
Table 6:
NOTE:
Table 7:
NOTE:
09005aef80b5a323
MT28F640J3.fm – Rev. N 3/05 EN
OFFSET
00h
01h
(BA+2)h
03–0Fh
10h
1Bh
27h
P
1. In word mode, A0 is not driven, so 0010h means that Address A5 = 1.
1. Refer to the Query Structure Output section and offset 28h for the detailed definition of offset address as a func-
2. BA = Block address beginning location (i.e., 020000h is block two’s beginning location when the block size is 64K-
3. Offset 15 defines “P,” which points to the Primary Extended Query Table.
3
The QUERY command makes the Flash component
tion of device bus width and mode.
word).
OFFSET
A16–A1
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
. . .
2
1
Example: Query Structure Output of x16- and x8-Capable Devices
Query Structure
WORD ADDRESSING
SUBSECTION NAME
Block Status Register
Reserved
CFI Query Identification String
System Interface Information
Device Geometry Definition
Primary Extended Query Table
HEX CODE
A_ID LO
P_ID LO
A_ID HI
P_ID HI
0051
0052
0059
P LO
P HI
. . .
DQ15–DQ0
1
AltVendor
PrVendor
PrVendor
VALUE
TblAdr
ID#
ID#
. . .
Q
R
Y
DESCRIPTION
Manufacturer compatibility code
Device code
Block-specific information
Reserved for vendor-specific information
Reserved for vendor-specific information
Command-set ID and vendor data offset
Flash device layout
Vendor-defined additional information specific to the primary
vendor algorithm
17
OFFSET
A7–A0
20h
21h
22h
23h
24h
25h
28h
26h
27h
. . .
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BYTE ADDRESSING
128Mb, 64Mb, 32Mb
HEX CODE
P_ID LO
P_ID LO
Q-FLASH MEMORY
P_ID HI
. . .
51
51
52
52
59
59
DQ7–DQ0
©2000 Micron Technology. Inc.
PrVendor
PrVendor
VALUE
ID#
. . .
Q
Q
R
Y
Y
R