AT49SV322D-80TU Atmel, AT49SV322D-80TU Datasheet - Page 3

IC FLASH 32MBIT 80NS 48TSOP

AT49SV322D-80TU

Manufacturer Part Number
AT49SV322D-80TU
Description
IC FLASH 32MBIT 80NS 48TSOP
Manufacturer
Atmel
Datasheet

Specifications of AT49SV322D-80TU

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (2M x 16)
Speed
80ns
Interface
Parallel
Voltage - Supply
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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3. Block Diagram
4. Device Operation
4.1
4.2
3623A–FLASH–7/06
Command Sequences
Read
A0 - A20
Y-DECODER
X-DECODER
ADDRESS
BUFFER
LATCH
INPUT
When the device is first powered on, it will be reset to the read or standby mode, depending
upon the state of the control line inputs. In order to perform other device functions, a series of
command sequences are entered into the device. The command sequences are shown in the
“Command Definition Table” on page 12
codes). The command sequences are written by applying a low pulse on the WE or CE input
with CE or WE low (respectively) and OE high. The address is latched on the falling edge of
CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.
Standard microprocessor write timings are used. The address locations used in the command
sequences are not affected by entering the command sequences.
The AT49SV322D(T) is accessed like an EPROM. When CE and OE are low and WE is high,
the data stored at the memory location determined by the address pins are asserted on the
outputs. The outputs are put in the high impedance state whenever CE or OE is high. This
dual-line control gives designers flexibility in preventing bus contention.
OUTPUT
BUFFER
COMPARATOR
MEMORY
IDENTIFIER
I/O0 - I/O15
REGISTER
REGISTER
Y-GATING
STATUS
MAIN
DATA
BUFFER
INPUT
(I/O8 - I/O15 are don’t care inputs for the command
WRITE STATE
COMMAND
REGISTER
MACHINE
PROGRAM/ERASE
VOLTAGE SWITCH
AT49SV322D(T)
CE
WE
OE
RESET
RDY/BUSY
VPP
VCC
GND
3

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