AT45DB081D-SU Atmel, AT45DB081D-SU Datasheet - Page 9
![IC FLASH 8MBIT 66MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
AT45DB081D-SU
Manufacturer Part Number
AT45DB081D-SU
Description
IC FLASH 8MBIT 66MHZ 8SOIC
Manufacturer
Atmel
Specifications of AT45DB081D-SU
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
8M (4096 pages x 264 bytes)
Speed
66MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Architecture
Sectored
Interface Type
SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
15 mA
Mounting Style
SMD/SMT
Organization
64 KB x 16
Memory Configuration
4096 Pages X 264 Bytes
Clock Frequency
50MHz
Supply Voltage Range
2.5V To 3.6V, 2.7V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT45DB081D-SU
Manufacturer:
ATMEL
Quantity:
750
Company:
Part Number:
AT45DB081D-SU
Manufacturer:
ATMEL
Quantity:
8
Part Number:
AT45DB081D-SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT45DB081D-SU-2.5
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7.4
7.5
Table 7-1.
3596F–DFLASH–8/07
PA11/
A19
0
0
0
0
1
1
1
1
•
•
•
Page Erase
Block Erase
PA10/
A18
0
0
0
0
1
1
1
1
•
•
•
Block Erase Addressing
PA9/
A17
0
0
0
0
1
1
1
1
•
•
•
The Page Erase command can be used to individually erase any page in the main memory array
allowing the Buffer to Main Memory Page Program to be utilized at a later time. To perform a
page erase in the DataFlash standard page size (264 bytes), an opcode of 81H must be loaded
into the device, followed by three address bytes comprised of 3 don’t care bits, 12 page address
bits (PA11 - PA0) that specify the page in the main memory to be erased and 9 don’t care bits.
To perform a page erase in the binary page size (256 bytes), the opcode 81H must be loaded
into the device, followed by three address bytes consist of 4 don’t care bits, 12 page address bits
(A19 - A8) that specify the page in the main memory to be erased and 8 don’t care bits. When a
low-to-high transition occurs on the CS pin, the part will erase the selected page (the erased
state is a logical 1). The erase operation is internally self-timed and should take place in a maxi-
mum time of t
A block of eight pages can be erased at one time. This command is useful when large amounts
of data has to be written into the device. This will avoid using multiple Page Erase Commands.
To perform a block erase for the DataFlash standard page size (264 bytes), an opcode of 50H
must be loaded into the device, followed by three address bytes comprised of 3 don’t care bits,
9 page address bits (PA11 -PA3) and 12 don’t care bits. The 9 page address bits are used to
specify which block of eight pages is to be erased. To perform a block erase for the binary page
size (256 bytes), the opcode 50H must be loaded into the device, followed by three address
bytes consisting of 4 don’t care bits, 9 page address bits (A19 - A11) and 11 don’t care bits. The
9 page address bits are used to specify which block of eight pages is to be erased. When a low-
to-high transition occurs on the CS pin, the part will erase the selected block of eight pages. The
erase operation is internally self-timed and should take place in a maximum time of t
this time, the status register will indicate that the part is busy.
PA8/
A16
0
0
0
0
1
1
1
1
•
•
•
PA7/
A15
0
0
0
0
1
1
1
1
PE
•
•
•
. During this time, the status register will indicate that the part is busy.
PA6/
A14
1
1
1
1
0
0
0
0
•
•
•
PA5/
A13
0
0
0
0
1
1
1
1
•
•
•
PA4/
A12
0
0
1
1
0
0
1
1
•
•
•
PA3/
A11
0
1
0
1
0
1
0
1
•
•
•
PA2/
A10
X
X
X
X
X
X
X
X
•
•
•
PA1/
A9
X
X
X
X
X
X
X
X
•
•
•
AT45DB081D
PA0/
A8
X
X
X
X
X
X
X
X
•
•
•
BE
Block
508
509
510
511
. During
0
1
2
3
•
•
•
9