AT26DF161-MU Atmel, AT26DF161-MU Datasheet - Page 14

• Manufacturer Part Number: AT26DF161-MU
• Description: IC FLASH 16MBIT 66MHZ 8QFN
• Manufacturer: Atmel

Specifications of AT26DF161-MU

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (8192 pages x 256 bytes)
• Speed: 66MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VFQFN, 8-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.5
14
Global Protect/Unprotect
AT26DF161
issue the Unprotect Sector command will be ignored, and the device will reset the WEL bit in the
Status Register back to a logical “0” and return to the idle state once the CS pin has been
deasserted.
Figure 9-4.
The Global Protect and Global Unprotect features can work in conjunction with the Protect Sec-
tor and Unprotect Sector functions. For example, a system can globally protect the entire
memory array and then use the Unprotect Sector command to individually unprotect certain sec-
tors and individually reprotect them later by using the Protect Sector command. Likewise, a
system can globally unprotect the entire memory array and then individually protect certain sec-
tors as needed.
Performing a Global Protect or Global Unprotect is accomplished by writing a certain combina-
tion of data to the Status Register using the Write Status Register command (see “Write Status
Register” section on
mand is also used to modify the SPRL (Sector Protection Registers Locked) bit to control
hardware and software locking.
To perform a Global Protect, the appropriate WP pin and SPRL conditions must be met and the
system must write a logical “1” to bits 5, 4, 3, and 2 of the Status Register. Conversely, to per-
form a Global Unprotect, the same WP and SPRL conditions must be met but the system must
write a logical “0” to bits 5, 4, 3, and 2 of the Status Register.
necessary for a Global Protect or Global Unprotect to be performed.
SCK
CS
SO
SI
Unprotect Sector
page 21
MSB
HIGH-IMPEDANCE
0
0
0
1
1
2
OPCODE
for command execution details). The Write Status Register com-
1
3
1
4
0
5
0
6
1
7
MSB
A
8
A
9
A
10 11
A
ADDRESS BITS A23-A0
A
12
A
Table 9-2
A
26
A
27 28
A
A
29 30
A
details the conditions
A
31
3599H–DFLASH–8/09