AT49BV163A-55CU Atmel, AT49BV163A-55CU Datasheet - Page 5
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AT49BV163A-55CU
Manufacturer Part Number
AT49BV163A-55CU
Description
IC FLASH 16MBIT 55NS 48CBGA
Manufacturer
Atmel
Datasheet
1.AT49BV162A-70TI.pdf
(29 pages)
Specifications of AT49BV163A-55CU
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (2M x 8 or 1M x 16)
Speed
55ns
Interface
Parallel
Voltage - Supply
2.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-CBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT49BV163A-55CU
Manufacturer:
ATMEL
Quantity:
1 984
4.3
4.4
4.4.1
4.4.2
4.5
4.6
3349H–FLASH–3/05
Reset
Erasure
Byte/Word Programming
VPP Pin
Chip Erase
Sector Erase
A RESET input pin is provided to ease some system applications. When RESET is at a logic
high level, the device is in its standard operating mode. A low level on the RESET input halts the
present device operation and puts the outputs of the device in a high impedance state. When a
high level is reasserted on the RESET pin, the device returns to the read or standby mode,
depending upon the state of the control inputs.
Before a byte/word can be reprogrammed, it must be erased. The erased state of memory bits is
a logical “1”. The entire device can be erased by using the Chip Erase command or individual
sectors can be erased by using the Sector Erase command.
The entire device can be erased at one time by using the six-byte chip erase software code.
After the chip erase has been initiated, the device will internally time the erase operation so that
no external clocks are required. The maximum time to erase the chip is t
If the sector lockdown has been enabled, the chip erase will not erase the data in the sector that
has been locked out; it will erase only the unprotected sectors. After the chip erase, the device
will return to the read or standby mode.
As an alternative to a full chip erase, the device is organized into 39 sectors (SA0 - SA38) that
can be individually erased. The Sector Erase command is a six-bus cycle operation. The sector
address is latched on the falling WE edge of the sixth cycle while the 30H data input command is
latched on the rising edge of WE. The sector erase starts after the rising edge of WE of the sixth
cycle. The erase operation is internally controlled; it will automatically time to completion. The
maximum time to erase a sector is t
enabled, the sector will erase (from the same Sector Erase command). An attempt to erase a
sector that has been protected will result in the operation terminating immediately.
Once a memory block is erased, it is programmed (to a logical “0”) on a byte-by-byte or on a
word-by-word basis. Programming is accomplished via the internal device command register
and is a four-bus cycle operation. The device will automatically generate the required internal
program pulses.
Any commands written to the chip during the embedded programming cycle will be ignored. If a
hardware reset happens during programming, the data at the location being programmed will be
corrupted. Please note that a data “0” cannot be programmed back to a “1”; only erase opera-
tions can convert “0”s to “1”s. Programming is completed after the specified t
Data Polling feature or the Toggle Bit feature may be used to indicate the end of a program
cycle. If the erase/program status bit is a “1”, the device was not able to verify that the erase or
program operation was performed successfully.
The circuitry of the AT49BV162A(T) is designed so that the device cannot be programmed or
erased if the V
erase operations can be performed. The VPP pin cannot be left floating.
PP
voltage is less that 0.4V. When V
SEC
. When the sector programming lockdown feature is not
PP
is at 0.9V or above, normal program and
AT49BV162/163A(T)
EC
.
BP
cycle time. The
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