AT45DB161D-TU-2.5 Atmel, AT45DB161D-TU-2.5 Datasheet - Page 15

• Manufacturer Part Number: AT45DB161D-TU-2.5
• Description: IC FLASH 16MBIT 50MHZ 28TSOP
• Manufacturer: Atmel

Specifications of AT45DB161D-TU-2.5

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (4096 pages x 528 bytes)
• Speed: 50MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSOP
• Architecture: Sectored
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 15 mA
• Mounting Style: SMD/SMT
• Organization: 128 KB x 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3500N–DFLASH–05/10
9.1.3
Figure 9-4.
guaranteed. Furthermore, if more than 16-bytes of data is clocked into the device, then the data will wrap back
around to the beginning of the register. For instance, if 17-bytes of data are clocked in, then the 17
stored at byte location 0 of the Sector Protection Register.
If a value other than 00H or FFH is clocked into a byte location of the Sector Protection Register, then the
protection status of the sector corresponding to that byte location cannot be guaranteed. For example, if a value of
17H is clocked into byte location 2 of the Sector Protection Register, then the protection status of sector 2 cannot
be guaranteed.
The Sector Protection Register can be reprogrammed while the sector protection enabled or disabled. Being able
to reprogram the Sector Protection Register with the sector protection enabled allows the user to temporarily
disable the sector protection to an individual sector rather than disabling sector protection completely.
The Program Sector Protection Register command utilizes the internal SRAM buffer 1 for processing. Therefore,
the contents of the buffer 1 will be altered from its previous state when this command is issued.
Table 9-5.
Figure 9-3.
Read Sector Protection Register Command
To read the Sector Protection Register, the CS pin must first be asserted. Once the CS pin has been asserted, an
opcode of 32H and three dummy bytes must be clocked in via the SI pin. After the last bit of the opcode and
dummy bytes have been clocked in, any additional clock pulses on the SCK pins will result in data for the content
of the Sector Protection Register being output on the SO pin. The first byte corresponds to sector 0 (0a, 0b), the
second byte corresponds to sector 1 and the last byte (byte 16) corresponds to sector 15. Once the last byte of the
Sector Protection Register has been clocked out, any additional clock pulses will result in undefined data being
output on the SO pin. The CS must be deasserted to terminate the Read Sector Protection Register operation and
put the output into a high-impedance state.
Table 9-6.
Note:
CS
SO
Command
Program Sector Protection Register
CS
Command
Read Sector Protection Register
SI
SI
Read Sector Protection Register
xx = Dummy Byte
Each transition
represents eight bits
Each transition
represents eight bits
Program Sector Protection Register Command
Program Sector Protection Register
Read Sector Protection Register Command
Opcode
Opcode
Byte 1
Opcode
Byte 2
X
Opcode
Byte 3
X
Byte 1
Byte 1
3DH
32H
Opcode
Byte 4
X
Byte 2
Byte 2
2AH
xxH
Data Byte
Data Byte
n
n
Byte 3
Byte 3
Data Byte
Data Byte
7FH
xxH
n + 1
n + 1
Atmel AT45DB161D
Byte 4
Byte 4
FCH
xxH
Data Byte
Data Byte
n + 15
n + 15
th
byte will be
15