AT49BV320D-70TU Atmel, AT49BV320D-70TU Datasheet

IC FLASH 32MBIT 70NS 48TSOP

AT49BV320D-70TU

Manufacturer Part Number
AT49BV320D-70TU
Description
IC FLASH 32MBIT 70NS 48TSOP
Manufacturer
Atmel
Datasheets

Specifications of AT49BV320D-70TU

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (2M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Capacitance, Input
4 pF
Capacitance, Output
8 pF
Current, Input, Leakage
2 μA
Current, Output, Leakage
2
Density
32M
Organization
2M×16
Package Type
TSOP
Temperature, Operating
-40 to +85 °C
Time, Access
70 ns
Time, Address Setup
20
Voltage, Input, Low
0.6 V
Voltage, Output, Low
0.45 V
Voltage, Supply
2.65 to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
1. Description
The AT49BV320D(T) is a 2.7-volt 32-megabit Flash memory organized as 2,097,152
words of 16 bits each. The memory is divided into 71 sectors for erase operations.
The device is offered in a 48-lead TSOP package and a 47-ball CBGA package. The
device has CE and OE control signals to avoid any bus contention. This device can be
read or reprogrammed using a single power supply, making it ideally suited for in-sys-
tem programming.
The device powers on in the read mode. Command sequences are used to place
the device in other operation modes such as program and erase. The device has
the capability to protect the data in any sector (see
page
To increase the flexibility of the device, it contains an Erase Suspend and Program
Suspend feature. This feature will put the erase or program on hold for any amount of
time and let the user read data from or program data to any of the remaining sectors
within the memory.
The VPP pin provides data protection. When the V
and erase functions are inhibited. When V
and erase operations can be performed. With V
Program command) operation is accelerated.
Single Voltage Read/Write Operation: 2.65V to 3.6V
Access Time – 70 ns
Sector Erase Architecture
Fast Word Program Time – 10 µs
Fast Sector Erase Time – 100 ms
Suspend/Resume Feature for Erase and Program
Low-power Operation
VPP Pin for Write Protection and Accelerated Program Operation
WP Pin for Sector Protection
RESET Input for Device Initialization
Flexible Sector Protection
TSOP and CBGA Package Options
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Minimum 100,000 Erase Cycles
Common Flash Interface (CFI)
Green (Pb/Halide-free) Packaging
– Sixty-three 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
– Supports Reading and Programming from Any Sector by Suspending Erase
– Supports Reading Any Word by Suspending Programming of Any Other Word
– 10 mA Active
– 15 µA Standby
6).
of a Different Sector
PP
is at 1.65V or above, normal program
PP
PP
at 10.0V, the program (Dual-word
input is below 0.4V, the program
“Flexible Sector Protection” on
32-megabit
(2M x 16)
3-volt Only
Flash Memory
AT49BV320D
AT49BV320DT
Not Recommended
for New Design
Contact Atmel to discuss
the latest design in trends
and options
3581D–FLASH–2/06

Related parts for AT49BV320D-70TU

AT49BV320D-70TU Summary of contents

Page 1

... Green (Pb/Halide-free) Packaging 1. Description The AT49BV320D( 2.7-volt 32-megabit Flash memory organized as 2,097,152 words of 16 bits each. The memory is divided into 71 sectors for erase operations. The device is offered in a 48-lead TSOP package and a 47-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-sys- tem programming ...

Page 2

... Pin Name A0 - A20 RESET VPP I/O0 - I/O15 NC VCCQ WP 2.1 TSOP Top View (Type 1) 2.2 CBGA Top View (Ball Down) AT49BV320D(T) 2 Function Addresses Chip Enable Output Enable Write Enable Reset Write Protection Data Inputs/Outputs No Connect Output Power Supply Write Protect A15 1 48 ...

Page 3

... The address locations used in the command sequences are not affected by entering the com- mand sequences. 4.2 Read When the AT49BV320D( the read mode, with CE and OE low and WE high, the data stored at the memory location determined by the address pins are asserted on the outputs. The 3581D–FLASH–2/06 I/O0 - I/O15 ...

Page 4

... The status register indicates the programming status. While the program sequence executes, status bit I/O7 is “0”. 4.6 VPP Pin The circuitry of the AT49BV320D(T) is designed so that the device cannot be programmed or erased if the V erase operations can be performed. The VPP pin cannot be left floating. AT49BV320D(T) 4 voltage is less that 0 ...

Page 5

... If a Program or Erase operation is attempted to one of the locked sectors, this bit is set by the WSM. The operation specified is aborted and the device is returned to read status mode. This bit is reserved for future use and should be masked out when polling the status register. AT49BV320D(T) PSS SLS 2 1 ...

Page 6

... Flexible Sector Protection The AT49BV320D(T) offers two sector protection modes, the Softlock and the Hardlock. The Softlock mode is optimized as sector protection for sectors whose content changes frequently. The Hardlock protection mode is recommended for sectors whose content changes infrequently. ...

Page 7

... IH 60h/ D0h [100] 1. The notation [ denotes the locking state of a sector. The current locking state of a sector is defined by the state of WP and the two bits of the sector-lock status D[1:0]. AT49BV320D(T) Erase/ Prog Comments Yes No sector is locked Sector is Softlocked. The Unlock command No can unlock the sector ...

Page 8

... Protection Register The AT49BV320D(T) contains a 128-bit register that can be used for security purposes in sys- tem design. The protection register is divided into two 64-bit sectors. The two sectors are designated as sector A and sector B. The data in sector A is non-changeable and is pro- grammed at the factory with a unique number ...

Page 9

... Hardware Data Protection The Hardware Data Protection feature protects against inadvertent programs to the AT49BV320D(T) in the following ways: (a) V function is inhibited. (b) V device will automatically time out 10 ms (typical) before programming. (c) Program inhibit: hold- ing any one of OE low, CE high or WE high inhibits program cycles. (d) Program inhibit: V less than V 4 ...

Page 10

... Full Status Check Flowchart Read Status Register 1 SR3 = 0 1 SR4 = 0 1 SR1 = Protect Error 0 Program Successful AT49BV320D( Word Program Procedure Bus Operation Write Write Read Program Suspend Idle Loop Repeat for subsequent Word Program operations. Full status register check can be done after each program, or after a sequence of program operations ...

Page 11

... Program Suspend/Resume Operation Write Write Read Program Completed Write Read (Read Write Write FF Array) Read Data AT49BV320D(T) Procedure Bus Command Comments Data = B0 Program Suspend Addr = Any address Data = 70 Read Status Addr = Any address Status register data: Toggle CE or None ...

Page 12

... SR4, SR5 Sequence Error 0 1 Sector SR5 = 0 1 Sector SR1 = 0 Sector Erase Successful AT49BV320D(T) 12 12. Sector Erase Procedure Bus Operation Write Write Suspend Erase Loop Read Ye s Idle Repeat for subsequent sector erasures. Full status register check can be done after each sector erase, or after a sequence of sector erasures ...

Page 13

... Erase Suspend/Resume Procedure Operation Write Write Read Erase Completed Write Read or Write Write Write FF (Read Array) Read Array Data AT49BV320D(T) Bus Command Comments Data = B0 Erase Suspend Addr = Any address Data = 70 Read Status Addr = Any address Status register data: Toggle CE or None ...

Page 14

... Program Error 0 1 Register Locked; = SR3, SR4 Program Aborted 0 Program Successful AT49BV320D(T) 14 18. Protection Register Programming Bus Operation Write Write Read Idle Program Protection Register operation addresses must be within the protection register address space. Addresses outside this space will return an error. ...

Page 15

... and D , must only differ in address A0. This command should be used during IN0 IN1 16. *NOTICE: + 0.6V CC AT49BV320D(T) 2nd Bus 3rd Bus Cycle Cycle Addr Data Addr ( Addr D IN Addr0 D Addr1 IN0 ( ( ( ( OUT (5) Addr FFFD ( OUT = 9.5V. The addresses, PP “Protection Regis- Stresses beyond those listed under “Absolute Maximum Ratings” ...

Page 16

... Protection Register Addressing Table Address Use Sector 81 Factory A 82 Factory A 83 Factory A 84 Factory A 85 User B 86 User B 87 User B 88 User B Note: All address lines not specified in the above table must be “0” when accessing the protection register, i.e., A20 - AT49BV320D( ...

Page 17

... AT49BV320D Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 SA35 ...

Page 18

... AT49BV320D Sector Address Table (Continued) Sector SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 AT49BV320D(T) 18 Size (Bytes/Words) ...

Page 19

... AT49BV320DT – Sector Address Table Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 SA33 SA34 ...

Page 20

... AT49BV320DT – Sector Address Table (Continued) Sector SA38 SA39 SA40 SA41 SA42 SA43 SA44 SA45 SA46 SA47 SA48 SA49 SA50 SA51 SA52 SA53 SA54 SA55 SA56 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 SA67 SA68 SA69 SA70 AT49BV320D(T) ...

Page 21

... X X Output Disable X Reset X Product Identification Software Notes: 1. The VPP pin can be tied can Refer to AC programming waveforms (min) = 1.65V. IHPP 5. V (max) = 0.4V. ILPP 6. Manufacturer Code: 001FH, Device Code: 90C5H – AT49BV320D; 90C4H – AT49BV320DT 3581D–FLASH–2/06 Ind RESET (2) ...

Page 22

... Active Read Current Programming Current CC1 Input Load Current PP1 PP V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH Note the erase mode mA. CC AT49BV320D(T) 22 Condition Min I 0. MHz OUT V - 0.6 CCQ -100 µ 0.1 ...

Page 23

... Input Test Waveforms and Measurement Level 30. Output Test Load 31. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: This parameter is characterized and is not 100% tested. 3581D–FLASH–2/06 2.0V 1.5V 0. < CCQ 1.8 30 1.3 Max Units AT49BV320D(T) Conditions OUT 23 ...

Page 24

... This parameter is characterized and is not 100% tested. AT49BV320D(T) 24 (1)(2)(3)( ADDRESS VALID ACC t RO HIGH Z OUTPUT - t after the address transition without impact on t ACC after the falling edge of CE without impact AT49BV320D(T)-70 Min Max 100 VALID . ACC after an address change CE ACC OE ...

Page 25

... Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Write Pulse Width High WPH t Data Setup Time Data, OE Hold Time DH OEH 35. AC Word Load Waveforms 35.1 WE Controlled 35.2 CE Controlled 3581D–FLASH–2/06 AT49BV320D(T) Min Max Units ...

Page 26

... A20 DATA 38. Sector Erase Cycle Waveforms ( A0-A20 DATA Notes: 1. Any address can be used to load the data must be high only when WE and CE are both low. 3. The data can be 40H or 10H. 4. The address depends on what sector erased. AT49BV320D(T) 26 Min 500 PROGRAM CYCLE WPH ...

Page 27

... Z = 256 (Top); 8K bytes (Bottom) 0000h 64K bytes 256 (Top); 8K bytes (Bottom) 003Eh 8K bytes (Top); 64K bytes (Bottom) 0000h 8K bytes (Top); 64K bytes (Bottom) 0000h 8K bytes (Top); 64K bytes 256 (Bottom) 0001h 8K bytes (Top); 64K bytes 256 (Bottom) AT49BV320D(T) 27 ...

Page 28

... AT49BV320D(T) 28 AT49BV320D Comments VENDOR SPECIFIC EXTENDED QUERY 0050h “P” 0052h “R” 0049h “I” 0031h Major version number, ASCII 0030h Minor version number, ASCII Bit 0 – chip erase supported, 0 – no, 1 – yes Bit 1 – ...

Page 29

... Standby 70 25 0.025 47C1 47-ball, Plastic Chip-Size Ball Grid Array Package (CBGA) 48T 48-lead, Plastic Thin Small Outline Package (TSOP) 3581D–FLASH–2/06 Ordering Code AT49BV320D-70CU AT49BV320D-70TU AT49BV320DT-70CU AT49BV320DT-70TU Package Type AT49BV320D(T) Package Operation Range 47C1 48T Industrial (-40 to 85C) ...

Page 30

... E A1 BALL ID TOP VIEW 0.875 REF BOTTOM VIEW 2325 Orchard Parkway San Jose, CA 95131 R AT49BV320D( BALL CORNER 3.125 REF TITLE 47C1, 47-ball ( Array), 0.75 mm Pitch, 7.0 x 10.0 x 1.0 mm Chip-scale Ball Grid Array Package (CBGA SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN ...

Page 31

... Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R 3581D–FLASH–2/06 PIN SEATING PLANE A1 TITLE 48T, 48-lead ( Package) Plastic Thin Small Outline Package, Type I (TSOP) AT49BV320D(T) 0º ~ 8º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – ...

Page 32

... Modified Erase Suspend/Resume Procedure on page 13 to match the flow chart.  Added CBGA Package Option.  Changed the CFI values of addresses 20h & 24h to 0002h and 0004h, respectively.  Changed the AT49BV320DT CFI values of addresses 23h & 25h to 0004h and 0004h, respectively. 3581D–FLASH–2/06 ...

Page 33

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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